• ETRI Journal
• /
• v.30 no.1
• /
• pp.141-151
• /
• 2008

In this paper, we introduce a new verification platform with ARM- and DSP-based multiprocessor architecture. Its simple communication interface with a crossbar switch architecture is suitable for a heterogeneous multiprocessor platform. The platform is used to verify the function and performance of a DVB-T baseband receiver using hardware and software partitioning techniques with a seamless hardware/software co-verification tool. We present a dual-processor platform with an ARM926 and a Teak DSP, but it cannot satisfy the standard specification of EN 300 744 of DVB-T ETSI. Therefore, we propose a new multiprocessor strategy with an ARM926 and three Teak DSPs synchronized at 166 MHz to satisfy the required specification of DVB-T.

• Journal of Satellite, Information and Communications
• /
• v.2 no.2
• /
• pp.85-91
• /
• 2007

The satellite networks provide global coverage. The integration of terrestrial networks with a satellite network is the most attractive approach to develop a global communication system. The IP Multimedia Subsystem (IMS) is intended to be the system that will merge the internet with the telecom world. A user with a dual-mode terminal can access both the satellite network and terrestrial network. The seamless handoff between two networks and a user's QoS level is the major issue concerning this integration. In this paper, we propose IMS-based satellite/terrestrial integrated network architecture for a global communication system. Based on the proposed architecture, an inter-network handoff and end-to-end soft QoS procedure is discussed. Our proposed soft QoS scheme is also analyzed to calculate the number of rejected calls.

• IEMEK Journal of Embedded Systems and Applications
• /
• v.2 no.1
• /
• pp.1-8
• /
• 2007

In this paper, we developed a file system architecture for portable multimedia devices. To enhance user convenience, the information about the stored files should be easily retrieved and organized. We defined NMD (Networked MetaData), which can organize the files in networked fashion by attaching user-defined attributes and relation between files. The NMD is stored in flash memory to utilize its nonvolatile property and low-power consumption, while multimedia files are stored in hard disk, an inexpensive mass storage. The experimental implementation showed that this architecture was able to save about 10% power compared to the hard disk NMD-store.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.6 no.4
• /
• pp.227-233
• /
• 2006

In order to reduce blocking artifacts and improve compression efficiency, H.264/AVC standard employs an adaptive in-loop deblocking filter. This paper proposes a new hardware architecture of the deblocking filter that employs a four-stage pipelined structure with an efficient data distribution. The proposed architecture allows a simultaneous supply of eight data samples to fully utilize the pipelined filter in both horizontal and vertical filterings. This paper also presents a new filtering order and data reuse scheme between consecutive macroblock filterings to reduce the communication for external memory access. The number of required cycles for filtering one macroblock (MB) is 357 cycles when the proposed filter uses dual port SRAMs. This execution speed is only 41.3% of that of the fastest previous work.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.49 no.8
• /
• pp.55-62
• /
• 2012

The development of memory design and process technology enabled the production of high density memory. As the weight of embedded memory within aggregate Systems-On-Chips(SoC) gradually increases to 80-90% of the number of total transistors, the importance of testing embedded dual-port memories in SoC increases. This paper proposes a new micro-code based programmable memory Built-In Self-Test(PMBIST) architecture for dual-port memories that support test various test algorithms. In addition, various test algorithms including March based algorithms and dual-port memory test algorithms are efficiently programmed through the proposed algorithm instruction set. This PMBIST has an optimized hardware overhead, since test algorithm can be implemented with the minimum bits by the optimized algorithm instructions.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.18 no.4
• /
• pp.938-958
• /
• 2024

Unsupervised Video Object Segmentation (UVOS) is a highly challenging problem in computer vision as the annotation of the target object in the testing video is unknown at all. The main difficulty is to effectively handle the complicated and changeable motion state of the target object and the confusion of similar background objects in video sequence. In this paper, we propose a novel deep Dual-stream Co-enhanced Network (DC-Net) for UVOS via bidirectional motion cues refinement and multi-level feature aggregation, which can fully take advantage of motion cues and effectively integrate different level features to produce high-quality segmentation mask. DC-Net is a dual-stream architecture where the two streams are co-enhanced by each other. One is a motion stream with a Motion-cues Refine Module (MRM), which learns from bidirectional optical flow images and produces fine-grained and complete distinctive motion saliency map, and the other is an appearance stream with a Multi-level Feature Aggregation Module (MFAM) and a Context Attention Module (CAM) which are designed to integrate the different level features effectively. Specifically, the motion saliency map obtained by the motion stream is fused with each stage of the decoder in the appearance stream to improve the segmentation, and in turn the segmentation loss in the appearance stream feeds back into the motion stream to enhance the motion refinement. Experimental results on three datasets (Davis2016, VideoSD, SegTrack-v2) demonstrate that DC-Net has achieved comparable results with some state-of-the-art methods.

• Korean Institute of Interior Design Journal
• /
• v.24 no.1
• /
• pp.93-103
• /
• 2015

This study set out to figure out the tendencies of the staff members participating in the space design of Blade Runner and compare and analyze its set and location characteristics with its narrative based on Gilles Deleuze' Simulacrum, one of the basic theories of Post modernism, thus identifying the characteristics of postmodern space inherent in it. The findings were as follows: first, the spaces in a Late modernism tendency in Blade Runner seem to have been created by the cinematic imagination of Syd Mead and Douglas Trumbull rather than being influenced by the old Late modernism architecture. Second, the postmodern spaces of the movie were designed to depict a more realistic future by reinforcing the old ornamental elements or adding the mechanical aesthetics of Late modernism based on a prediction of future cities. Third, the characters representing Late modernism and Post modernism in the narrative of the movie embrace the tendencies of the parties objected by Model and Simulacrum in the scenes where they deny the tendencies of the spaces to which they belong, thus exhibiting a dual trend. Fourth, the dual narrative of Model and Simulacrum holds duality even in the space and architecture of the movie, which is the reason why the movie chose postmodern spaces reflecting historical contexts instead of inner spaces in the tendency of minimalism, which was in vogue when SF movies were made those days. Finally, the spaces of the movie can be categorized according to the Late modernism and Post modernism tendencies from the perspective of the 1980s and be understood to show the architecture and space of future Post modernism feasible through the layering of historicity, locality, and mechanical aesthetics from ancient Maya to a future city in Los Angeles, the background of the movie, from the perspective of 2019.

• Journal of IKEEE
• /
• v.28 no.2
• /
• pp.234-238
• /
• 2024

This paper presents a study on the integration of 3D-stacked dual-tip RRAM with a CNN accelerator architecture, leveraging its low drive current characteristics and scalability in a 3D stacked configuration. The dual-tip structure is utilized in a parallel connection format in a synaptic array to implement multi-level capabilities. It is configured within a Network-on-chip style accelerator along with various hardware blocks such as DAC, ADC, buffers, registers, and shift & add circuits, and simulations were performed for the CNN accelerator. The quantization of synaptic weights and activation functions was assumed to be 16-bit. Simulation results of CNN operations through a parallel pipeline for this accelerator architecture achieved an operational efficiency of approximately 370 GOPs/W, with accuracy degradation due to quantization kept within 3%.

• Earthquakes and Structures
• /
• v.12 no.3
• /
• pp.263-270
• /
• 2017

In this study, two geometrically identical multi-storey steel buildings with different lateral load resisting systems are structurally analyzed under same earthquake conditions and they are compared with respect to their construction costs of their structural systems. One of the systems is a steel structure with eccentrically steel braced frames. The other one is a RC wall-steel frame system, that is a steel framed structure in combination with a reinforced concrete core and shear walls of minimum thickness that the national code allows. As earthquake resisting systems, steel braced frames and reinforced concrete shear walls, for both cases are located on identical places in either building. Floors of both buildings will be of reinforced concrete slabs of same thickness resting on composite beams. The façades are assumed to be covered identically with light-weight aluminum cladding with insulation. Purpose of use for both buildings is an office building of eight stories. When two systems are structurally analyzed by FEM (finite element method) and dimensionally compared, the dual one comes up with almost 34% less cost of construction with respect to their structural systems. This in turn means that, by using a dual system in earthquake zones such as Turkey, for multi-storey steel buildings with RC floors, more economical solutions can be achieved. In addition, slender steel columns and beams will add to that and consequently more space in rooms is achieved.

• Journal of the Korean Institute of Educational Facilities
• /
• v.24 no.5
• /
• pp.3-10
• /
• 2017

This study was tried to find out characteristics of students' movement in classroom and homeroom. The object was the school whose homebase management was different by grade. Observation research was tried about middle school class that is simultaneously worked with different type of homeroom and the movement of students under various situations was analyzed. As a result, students in exclusive subject classroom moved in short time within one or two minutes after class. In case of exclusive homeroom, returning frequency of students was nearly about 85 to 100 percent within ten minutes in end of end. Behavioral characteristics of students in dual purpose homeroom was similar in exclusive subject classroom. The class using dual purpose homeroom showed high ratio in use of center homebase, therefore, returning frequency at short recess time was extremely low. In case of dual purpose homeroom at lunch time, next class students moved in early time and maximized within one or two minutes in end of end. These results are thought to be useful for planning spaces of variation type.