• Advances in materials Research
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• v.1 no.2
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• pp.109-113
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• 2012

Electromigration-induced void evolutions in typical upper and lower layer dual-inlaid Copper (Cu) interconnect structures were simulated by applying a phenomenological model resorting to Monte Carlo based simulations, which considers redistribution of heterogeneously nucleated voids and/or pre-existing vacancy clusters at the Copper/dielectric cap interface during electromigration. The results indicate that this model can qualitatively explain the electromigration-induced void evolutions observations in many studies reported by several researchers heretofore. These findings warrant need to re-investigate technologically important electromigration mechanisms by developing rigorous models based on similar concepts.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.2
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• pp.324-328
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• 2012

A recovered jitter of CDR(Clock and Data Recovery) Circuit based on Dual-loop DLL(Delay Locked Loop) for data recovery in high speed serial data communication is changed by depending on the input data and reference clock frequency. In this paper, 2-step DPC which has constant jitter performance for wide-range input frequency is proposed. The designed prototype 2-step CDR using proposed 2-step DPC has operation frequency between 200Mbps and 4Gbps. Average delay step of 2-step DPC is 10ps. Designed CDR circuit was tested with 0.18um CMOS process.

• ETRI Journal
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• v.34 no.3
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• pp.466-469
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• 2012

In this letter, we propose a dual autostereoscopic display platform employing a natural interaction method, which will be useful for sharing visual data with users. To provide 3D visualization of a model to users who collaborate with each other, a beamsplitter is used with a pair of autostereoscopic displays, providing a visual illusion of a floating 3D image. To interact with the virtual object, we track the user's hands with a depth camera. The gesture recognition technique we use operates without any initialization process, such as specific poses or gestures, and supports several commands to control virtual objects by gesture recognition. Experiment results show that our system performs well in visualizing 3D models in real-time and handling them under unconstrained conditions, such as complicated backgrounds or a user wearing short sleeves.

• Proceedings of the Korea Society of Design Studies Conference
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• 2003.11a
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• pp.82-83
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• 2003

• Journal of Radiation Protection and Research
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• v.46 no.3
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• pp.112-119
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• 2021

Background: This work aims to develop a new imaging system based on a pulse shape discrimination-capable Cs₂LiYCl₆:Ce (CLYC) scintillation detector combined with the rotational modulation collimator (RMC) technique for dual-particle imaging. Materials and Methods: In this study, a CLYC-based RMC system was designed based on Monte Carlo simulations, and a prototype was fabricated. Therein, a rotation control system was developed to rotate the RMC unit precisely, and a graphical user interface-based software was also developed to operate the data acquisition with RMC rotation. The RMC system was developed to allow combining various types of collimator masks and detectors interchangeably, making the imaging system more versatile for various applications and conditions. Results and Discussion: Operational performance of the fabricated system was studied by checking the accuracy and precision of the collimator rotation and obtaining modulation patterns from a gamma-ray source repeatedly. Conclusion: The prototype RMC system showed reliability in its mechanical properties and reproducibility in the acquisition of modulation patterns, and it will be further investigated for its dual-particle imaging capability with various complex radioactive source conditions.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1666-1671
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• 1989

A novel switched-capacitor circuit for interfacing capacitive microtransducers with a digital system is developed based on the dual-slope integration. It consists of a differential integrator and a comparator. Driven by the teo phase clock, the circuit first senses the capacitance difference between the transducer and the reference capacitor in the form of charge, and accumulates it into the feedback capabitor of the integrator for a fixed period of time. The resulant accumulated charge is next extracted by the known reference charge until the integrator output voltage refurns to zero. The length of time required for the integrator output to return to zero, as measured by the number of clock cycle gated into a counter is proportional to the capacitance difference, averaged over the integration period. The whole operation is insensitive to the reference voltage and the capacitor values involved in the circuit, Thus the proposed circuit permits an accurate differental capacitance measurement. An error analysis has showh that the resolution as high as 8 bits can be expected by realizing the circuit in a monolithic MOS IC form. Besides the accuracy, it features the small device count integrable onto a small chip area. The circuit is thus particularly suitadble for the on-chip interface.

• The Journal of the Convergence on Culture Technology
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• v.5 no.4
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• pp.457-465
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• 2019

This paper present developing methods of man-machine interface(MMI) system for smart temperature controller with android platform. This MMI system could communicate with mobile machine. Firstly we present electrical hardware design method of MMI system of smart temperature controller. Smart temperature controller is composed of dual processors. Secondly we develop operating software of MMI system using android development environment. And finally we present verification of MMI systems of smart temperature controller with android platform through field experiment. This MMI system with android platform has rapid development speed due to performance of android platform.

• Journal of the Korean Society of Propulsion Engineers
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• v.25 no.2
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• pp.79-87
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• 2021

In this study, we developed a method to predict/analyze the performance of a dual thrust rocket motor that has 2 kinds propellant charged in axial direction. When transitioning from the booster to the suspender stage, a transient phenomenon related to performance occurred at the interface. The causes and characteristics of the transient phenomenon were investigated by comparing them with the results of the combustion test. It was confirmed that the performance transient phenomenon is sensitively generated not only by the shape design between the propellants with different properties of the propellant, but also by errors in manufacturing due to the propellant curing shrinkage.

• ETRI Journal
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• v.27 no.1
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• pp.81-88
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• 2005

In this paper, interface circuits that are suitable for point-to-point interconnection with an over 1 Gbps data rate per pin are proposed. To achieve a successful data transfer rate of multi-gigabits per-second between two chips with a point-to-point interconnection, the input receiver uses an on-chip parallel terminator of the pass gate style, while the output driver uses the pullup and pulldown transistors of the diode-connected style. In addition, the novel dynamic voltage level converter (DVLC) has solved such problems as the access time increase and valid data window reduction. These schemes were adopted on a 64 Mb DDR SRAM with a 1.5 Gbps data rate per pin and fabricated using a 0.10 ${\mu}m$ dual gate oxide CMOS technology.

• Transactions of the Korean Society of Mechanical Engineers
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• v.19 no.1
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• pp.170-180
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• 1995

A parallel crack in bonded dissimilar orthotropic planes under out-of-plane loading is analyzed. The problem is formulated by Fourier integral transforms, and reduced to a pair of dual integral equations. By solving the integral equations, the asymptotic stress and displacement fields near the crack tip are determined in closed form, from which the stress intensity factor and energy release rate are obtained. Discontinuity in the stress intensity factor as the distance ratio h/a of the parallel crack approaches zero is found, while the energy releas rate is shown to be continuous at h/a = 0. This information can immediately be used to generate the stress intensity factor for the parallel crack near the interface. By employing "the maximum energy release rate criterion", it could be shown in the case of no existing crack initially that the parallel crack is formed far from the interface for the more compliant material, while it is formed close to the interface for the stiffer material. material.