• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.77-81
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• 2002

This paper demonstrates a CMOS downconversion mixer for 2.4GHz ISM band applications. The mixer, implemented in a 0.18um CMOS process, is based on the CMOS Gilbert Cell mixer, With a 2.5GHz local oscillator and a 2.45GHz RF input, the measurement results exhibit power conversion gam of -6dB, IIP3 of -6dBm, input $P_{-1dB}$ of -15 dBm, and power dissipation in mixer core of 2.7 mW with 0㏈m LO power and 1.8V supply voltage.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.54-58
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• 2002

This paper describes the theoretical analysis and performance of a 2.4㎓ bulk-driven downconversion mixer, where the LO signal is input via the bulk. A mixer core designed with a 0.18$\mu\textrm{m}$ CMOS process is able to operate under 0.8V∼1V supply voltage. The RF, LO, and IF port frequencies are 2.45㎓, 2.4㎓, and 50MHz, respectively. The measurement results exhibit conversion gain of -1.8㏈, l㏈ compression point of -17㏈m and IIP3 of -4㏈m with 0㏈m LO power. The power consumption is as small as 4mW.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.91-95
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• 2003

In this work, we have designed Gilbert cell downconversion mixer using 0.25um Anam CMOS process, we also have analyzed Conversion gain and IIP3 using Taylor series in our own unique way. Especially, bulk terminal is used as LO( Local Oscillator) input for reduction of power consumption and supply voltage. Supply voltage used in this design is lower than 1.8V and core current is less than 500uA. The simulation experiments showed that the conversion gain, IIP3, and power consumption were -1dB, 4.46dBm, and 0.8mW, respectively.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.391-395
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• 2003

In this work, we have designed Gilbert cell downconversion mixer using 0.25um Anam CMOS process, we also have analyzed Conversion gain and IIP3 using Taylor series in our own unique way. Especially, bulk terminal is used as LO( Local Oscillator) input for reduction of power consumption and supply voltage. Supply voltage used in this design is lower than 1.8V and core current is less than 500uA. The simulation experiments showed that the conversion gain, IIP3, and power consumption were -1 dB, 4.46dBm, and 0.8mW, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.595-604
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• 2016

Utilizing a standard 130-nm CMOS process, a RF frontend is designed at 24 GHz for automotive collision avoidance radar application. Single IF direct conversion receiver (DCR) architecture is adopted to achieve high integration level and to alleviate the DCR problem. The proposed frontend is composed of a two-stage LNA and downconversion mixers. To save power consumption, and to enhance gain and linearity, stacked NMOS-PMOS $g_m$-boosting technique is employed in the design of LNA as the first stage. The switch transistors in the mixing stage are biased in subthreshold region to achieve low power consumption. The single balanced mixer is designed in PMOS transistors and is also realized based on the well-known folded architecture to increase voltage headroom. This frontend circuit features enhancement in gain, linearity, and power dissipation. The proposed circuit showed a maximum conversion gain of 19.6 dB and noise figure of 3 dB at the operation frequency. It also showed input and output return losses of less than -10 dB within bandwidth. Furthermore, the port-to-port isolation illustrated excellent characteristic between two ports. This frontend showed the third-order input intercept point (IIP3) of 3 dBm for the whole circuit with power dissipation of 6.5 mW from a 1.5 V supply.

• Journal of Advanced Navigation Technology
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• v.13 no.1
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• pp.48-53
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• 2009

The CMOS RF front-end for Global Positioning System(GPS)are implemented in 1P8M CMOS $0.13{\mu}m$ process. The LNAs consist of LNA1 with high gain and low NF, and LNA2 with low gain and high IIP3 for supporting operation with active and passive antenna. the measured performances of both LNAs are 16.4/13.8 dB gain, 1.4/1.68 dB NF, and -8/-4.4 dBm IIP3 with 3.2/2 mA form 1.2 V supply, respectively. The quadrature downconversion mixer is followed by transimpedance amplifier with gain controllability from 27.5 to 41 dB. The front-end performances in LNA1 mode are 39.8 dB conversion gain, 2.2 dB NF, and -33.4 dBm IIP3 with 6.6 mW power consumption.