• 제목/요약/키워드: Dissipation current

검색결과 448건 처리시간 0.025초

개선된 전류 감산기와 이를 이용한 노튼(Norton) 증폭기의 설계 (A Design of Improved Current Subtracter and Its Application to Norton Amplifier)

  • 차형우
    • 대한전자공학회논문지SD
    • /
    • 제48권12호
    • /
    • pp.82-90
    • /
    • 2011
  • 저전력 전류-모드 신호처리를 위해 새로운 AB급 전류 감산기와 이를 이용한 노튼(Norton) 증폭기를 설계하였다. 전류 감산기는 트랜스리니어 셀(translinear cell), 2개의 전류 미러, 그리고 공통-이미터 증폭기로 구성되었다. 전류 감산의 원리는 트랜스리니어 셀로 입력되는 두 전류의 차가 전류 미러에 의해 얻어지고 이 전류는 공통-이미터 증폭기에 의해 ${\beta}$배 증폭되는 것이다. 노튼 증폭기는 설계한 AB급 전류 감산기와 광대역 전압 버퍼(buffer)로 구성되었다. 시뮬레이션 결과 전류 감산기는 $20{\Omega}$의 입력 저항, 50배의 전류 증폭도, $i_{IN1}$ > $i_{IN2}{\geq}4I_B$의 전류 입력 범위를 갖고 있다는 것을 확인하였다. 노튼 증폭기는 ${\pm}2.5V$ 공급전압에서 312MHz의 단위-이득 주파수, 130dB의 트랜스래지스턴스(transresistance), 4mW의 소비전력은 갖고 있다.

Preparation and Properties of Y2O3-Doped ZrO2 Films on Etched Al Foil by Sol-Gel Process

  • Chen, Fei;Park, Sang-Shik
    • 한국재료학회지
    • /
    • 제25권2호
    • /
    • pp.107-112
    • /
    • 2015
  • The oxide films formed on etched aluminum foils play an important role as dielectric layers in aluminum electrolytic capacitors. $Y_2O_3$-doped $ZrO_2$ (YZ) films were coated on the etched aluminum foils by sol-gel dip coating, and the electrical properties of YZ-coated Al foils were characterized. YZ films annealed at $450^{\circ}C$ were crystallized into a cubic phase, and as the $Y_2O_3$ doping content increased, the unit cell of $ZrO_2$ expanded and the grain size decreased. The etch pits of Al foils were filled by YZ sol when it dried at atmospheric pressure after repeating for several times, but this step could essentially be avoided when being dried in a vacuum. YZ-coated foils indicated that the specific capacitance and dissipation factor were $2-2.5{\mu}F/cm^2$ and 2-4 at 1 kHz, respectively, and the leakage current and withstanding voltage of films approximately 200 nm thick were $5{\times}10^{-4}A$ at 21 V and 22 V, respectively. After being anodized at 500 V, the foils exhibited a specific capacitance and dissipation factor of $0.6-0.7{\mu}F/cm^2$ and 0.1-0.2, respectively, at 1 kHz, while the leakage current and withstanding voltage were $2{\times}10^{-4}-3{\times}10^{-5}A$ at 400 V and 420-450 V, respectively. This suggests that YZ film is a promising dielectric that can be used in high voltage Al electrolytic capacitors.

Analysis of Insulation Quality in Large Generator Stator Windings

  • Kim, Hee-Dong;Kong, Tae-Sik;Ju, Young-Ho;Kim, Byong-Han
    • Journal of Electrical Engineering and Technology
    • /
    • 제6권3호
    • /
    • pp.384-390
    • /
    • 2011
  • To evaluate the condition of stator winding insulation in generators that have been operated for a long period of time, diagnostic tests were performed on the stator bars of a 500 MW, 22 kV generator under accelerated thermal and electrical aging procedures. The tests included measurements of AC current (${\Delta}I$), dissipation factor ($tan{\delta}$), partial discharge (PD) magnitude, and capacitance (C). In addition, the AC current test was performed on the stator winding of a 350 MW, 24 kV generator under operation to confirm insulation deterioration. The values of ${\Delta}I$, ${\Delta}tan{\delta}$, and PD magnitude in one stator bar indicated serious insulation deterioration. In another stator bar, the ${\Delta}I$ measurements showed that the insulation was in good condition, whereas the values of ${\Delta}tan{\delta}$ and PD magnitude indicated an incipient stage of insulation deterioration. Measurements of ${\Delta}I$ and PD magnitude in all three phases (A, B, C) of the remaining generator stator windings showed that they were in good condition, although the ${\Delta}tan{\delta}$ measurements suggested that the condition of the insulation should be monitored carefully. Overall analysis of the results suggested that the generator stator windings were in good condition. The patterns of PD magnitude in all three phases (A, B, C) were attributed to internal discharge.

금속판으로 봉인된 유-무기 보호 박막을 갖는 OLED 봉지 방법 (Encapsulation Method of OLED with Organic-Inorganic Protective Thin Films Sealed with Metal Sheet)

  • 임수용;서정현;주성후
    • 한국전기전자재료학회논문지
    • /
    • 제26권7호
    • /
    • pp.539-544
    • /
    • 2013
  • To study the encapsulation method for heat dissipation of high brightness organic light emitting diode (OLED), red emitting OLED of ITO (150 nm) / 2-TNATA (50 nm) / NPB (30 nm) / $Alq_3$ : 1 vol.% Rubrene (30 nm) / $Alq_3$ (30 nm) / LiF (0.7 nm) / Al (200 nm) structure was fabricated, which on $Alq_3$ (150 nm) / LiF (150 nm) as buffer layer and Al as protective layer was deposited to protect the damage of OLED, and subsequently it was encapsulated using attaching film and metal sheet. The current density, luminance and power efficiency was improved according to thickness of Al protective layer. The emission spectrum and the Commission International de L'Eclairage (CIE) coordinate did not have any effects on encapsulation process using attaching film and metal sheet The lifetime of encapsulated OLED using attaching film and metal sheet was 307 hours in 1,200 nm Al thickness, which was increased according to thickness of Al protective layer, and was improved 7% compared with 287 hours, lifetime of encapsulated OLED using attaching film and flat glass. As a result, it showed the improved current density, luminance, power efficiency and the long lifetime, because the encapsulation method using attaching film and metal sheet could radiate the heat on OLED effectively.

디레이팅을 고려한 한국형발사체 S-밴드 송신기 전원부 설계 (Power Design of an S-Band Transmitter for KSLV-II with Derating)

  • 김석권;김성완;홍승현;김효종
    • 한국전자파학회논문지
    • /
    • 제30권5호
    • /
    • pp.339-347
    • /
    • 2019
  • 본 논문에서는 한국형발사체 탑재용 S-밴드 송신기의 전원부 설계에서 소자의 신뢰성 향상을 위하여 정격 대비 부하를 경감하는 디레이팅을 고려하였다. 송신기의 전원부는 정전압 공급을 위한 선형 전압 레귤레이터, 스위칭 타입의 DC/DC 컨버터와 역전압 보호를 위한 다이오드 등으로 구성된다. 설계에 따른 각 소자의 부하 전류를 분석하여 디레이팅 요구조건을 살펴보았으며, 부하 전류에 따른 발열량과 접합 온도 상승을 고려하였다. 송신기 엔지니어링 모델 제작결과와 분석결과를 비교하였으며, 고온 수락시험 $+60^{\circ}C$ 환경에서 전원부 주요 소자의 온도는 정격 대비 $40^{\circ}C$ 이상 여유가 있으며, 디레이팅 요구조건이 충족됨을 확인하였다.

비선형동적해석을 통한 건식 기계적이음을 갖는 프리캐스트 모멘트 골조의 동등성 평가 (Evaluation of Emulative Level for Precast Moment Frame Systems with Dry Mechanical Splices by Using Nonlinear Dynamic Analysis)

  • 김선훈;이원준;이득행
    • 한국지진공학회논문집
    • /
    • 제28권2호
    • /
    • pp.85-92
    • /
    • 2024
  • This study presents code-compliant seismic details by addressing dry mechanical splices for precast concrete (PC) beam-column connections in the ACI 318-19 code. To this end, critical observations of previous test results on precast beam-column connection specimens with the proposed seismic detail are briefly reported in this study, along with a typical reinforced concrete (RC) monolithic connection. On this basis, nonlinear dynamic models were developed to verify seismic responses of the PC emulative moment-resisting frame systems. As the current design code allows only the emulative design approach, this study aims at identifying the seismic performances of PC moment frame systems depending on their emulative levels, for which two extreme cases were intentionally chosen as the non-emulative (unbonded self-centering with marginal energy dissipation) and fully-emulative connection details. Their corresponding hysteresis models were set by using commercial finite element analysis software. According to the current seismic design provisions, a typical five-story building was designed as a target PC building. Subsequently, nonlinear dynamic time history analyses were performed with seven ground motions to investigate the impact of emulation level or hysteresis models (i.e., energy dissipation performance) on system responses between the emulative and non-emulative PC moment frames. The analytical results showed that both the base shear and story drift ratio were substantially reduced in the emulative system compared to that of the non-emulative one, and it indicates the importance of the code-compliant (i.e., emulative) connection details on the seismic performance of the precast building.

Flip Chip Assembly Using Anisotropic Conductive Adhesives with Enhanced Thermal Conductivity

  • Yim, Myung-Jin;Kim, Hyoung-Joon;Paik, Kyung-Wook
    • 마이크로전자및패키징학회지
    • /
    • 제12권1호
    • /
    • pp.9-16
    • /
    • 2005
  • This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.

  • PDF

2단 전류셀 매트릭스 구조를 지닌 저전압 고속 8비트 CMOS D/A 변환기 (A los voltage high speed 8 bit CMOS digital-to-analog converter with two-stage current cell matrix architecture)

  • 김지현;권용복;윤광섭
    • 전자공학회논문지C
    • /
    • 제35C권4호
    • /
    • pp.50-59
    • /
    • 1998
  • This paper describes a 3.3V 8bit CMOS digital to analog converter (DAC) with two state current cell metrix architecture which consists of a 4 MSB and a 4 LSB current matrix stage. The symmetric two stage current cell matrix architecture allow the designed DAC to reduce hot only a complexity of decoding logics, but also a number of wider swing cascode curent mirros. The designed DAC with an active chip area of 0.8 mm$_{2}$ is fabricated by a 0.8 .mu.m CMOS n-well standard digital process. The experimental data shows that the rise/fall time, the settling time, and INL/DNL are6ns, 15ns, and a less than .+-.0.8/.+-.0.75 LB, respectively. The designed DAC is fully operational for the power supply down to 2.0V, such that the DAC is suitable for a low voltage and a low power system application. The power dissipation of the DAC with a single power supply of 3.3V is measured to be 34.5mW.

  • PDF

전류재분배에 의한 저항형 초전도 한류기의 퀜치 특성 (Quench properties of a resistive superconducting fault current limiter by current redistribution)

  • 최효상;김혜림;차상도;현옥배;황시돌
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2002년도 하계학술대회 논문집 A
    • /
    • pp.336-338
    • /
    • 2002
  • We improved quench properties of a superconducting fault current limiter (SFCL) based on YBCO thin films by their serial and parallel combinations. The SFCL consisted of 6 switching elements fabricated of 4 inch-diameter YBCO thin films. Simple serial connection resulted in imbalanced power dissipation between switching elements even at the quench current difference of 0.6A. On the other hand, $2{\times}2\;and\;3{\times}2$ stack combinations produced simultaneous quenches. The $3{\times}2$ stack combination showed better simultaneous quench behavior than the $2{\times}2$ stacks. This is suggested to be because the currents between switching elements in parallel connection of the $3{\times}2$ stacks were more effectively redistributed than the $2{\times}2$ stacks.

  • PDF

Physics of Solar Flares

  • Magara, Tetsuya
    • 천문학회보
    • /
    • 제35권1호
    • /
    • pp.26.1-26.1
    • /
    • 2010
  • In this talk we outline the current understanding of solar flares, mainly focusing on magnetohydrodynamic (MHD) processes. A flare causes plasma heating, mass ejection, and particle acceleration which generates high-energy particles. The key physical processes producing a flare are: the emergence of magnetic field from the solar interior to the solar atmosphere (flux emergence), formation of current-concentrated areas (current sheets) in the corona, and magnetic reconnection proceeding in a current sheet to cause shock heating, mass ejection, and particle acceleration. A flare starts with the dissipation of electric currents in the corona, followed by various dynamic processes that affect lower atmosphere such as the chromosphere and photosphere. In order to understand the physical mechanism for producing a flare, theoretical modeling has been develops, where numerical simulation is a strong tool in that it can reproduce the time-dependent, nonlinear evolution of a flare. In this talk we review various models of a flare proposed so far, explaining key features of individual models. We introduce the general properties of flares by referring observational results, then discuss the processes of energy build-up, release, and transport, all of which are responsible for a flare. We will come to a concluding viewpoint that flares are the manifestation of the recovering and ejecting processes of a global magnetic flux tube in the solar atmosphere, which has been disrupted via interaction with convective plasma while rising through the convection zone.

  • PDF