• Title/Summary/Keyword: Display board

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Synthesis, Molecular Structure and Mesomorphic Phase Behavior of${\eta}^1$-Benzylideneaniline Palladium(II) Complexes

  • Yu, Yong Sik;Im, Jun Hwan;Han, Bong Hwan;Lee, Myeong Su;Choe, Mun Geun
    • Bulletin of the Korean Chemical Society
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    • v.22 no.12
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    • pp.1350-1360
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    • 2001
  • The synthesis and characterization of very stable Pd(Ⅱ) η1-imine complexes of bis(3,4-dialkyloxybenzylidene-3', 4'-dialkyloxyaniline)dichloropalladium(Ⅱ) with alkyl chain of hexyl (8), octyl (9), decyl (10) and dodecyl (11) groups, a nd of bis(4-ethyloxybenzylidene-4'-ethyloxyaniline)dichloropalladium(Ⅱ) as a model complex are described. The molecular structure with twisted board-like geometry of the complex resulting from the coordination of Pd(Ⅱ) with η1-imine bonding was confirmed by X-ray crystallographic analysis of the model complex. In contrast to the imine ligands, all the complexes with an exception of 11 display a thermally stable monotropic smectic A mesophase without any decomposition of the complex. These results, characterized by a combination of differential scanning calorimetry, optical polarized microscopy, and powder X-ray scattering experiments, are discussed.

A Study on the Development of AVCS(Airside Vehicle Control System) in Gimpo Airport Based on RTK-GPS (RTK-GPS 기반의 김포공항 이동지역 차량통제 시스템 개발방안 연구)

  • Sanghoon Cha;Minguan Kim;Jeongil Choi
    • Journal of Information Technology Services
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    • v.22 no.3
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    • pp.85-100
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    • 2023
  • The development of Airside Vehicle Control System(AVCS) at Gimpo Airport aims to reduce ground safety accidents in movement area and improve airport operation efficiency and safety management service quality. The vehicle is controlled by a brake controller RTK-antenna and On-Board Diagonostics(OBD) module. Location data is transmitted to a nearby communication base station through a Wi-Fi router and the base station is connected to the AVCS by an optical cable to transmit location data from each vehicle. The vehicle position is precisely corrected to display information using the system. The system allows airport operators to view registered information on aircraft and vehicles and monitor their locations speeds and directions in real time. When a vehicle approaches a dangerous area alarm warnings and remote brake control are possible to prevent accidents caused by carelessness of the driver in advance.

Tractor Performance Instrumentation System

  • Wan Ismail, Wan Ishak;Yahya, Azmi;Bardaie, Mohd. Zohadie
    • Proceedings of the Korean Society for Agricultural Machinery Conference
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    • 1996.06c
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    • pp.569-581
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    • 1996
  • A microcomputer -based data acquistion system was designed and developed at Michigan State University , USA to conduct field data studies. The system designed for the research carried out used an Apple IIe microcomputer for collecting data on-board the tractor. An AII3 Analog to Digital (A/D_ convertor was chosen to interface each analog signal to the microcomputer. A commercially available Dj TPM II was employed to display information such as an engine speed, ground speed, percent drive wheel slip , distance travelled and area covered per hour. The frequency output from the radar unit was channeled through a frequency to voltage (F/V) convertor , so that AII3 Analog to Digital (A/D) convertor could read it. The fuel consumption was measured using on EMCO pdp-1 fuel flow meter attached to the engine fuel line. The draft of the tillage and other drag equipment was determined using strain gages attached to the drawbar of the tractor. The system was developed to collect the draft and fuel requirements for various farm equipment different kind of soils.

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An Emulation System for Efficient Verification of ASIC Design (ASIC 설계의 효과적인 검증을 위한 에뮬레이션 시스템)

  • 유광기;정정화
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.10
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    • pp.17-28
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    • 1999
  • In this paper, an ASIC emulation system called ACE (ASIC Emulator) is proposed. It can produce the prototype of target ASIC in a short time and verify the function of ASIC circuit immediately The ACE is consist of emulation software in which there are EDIF reader, library translator, technology mapper, circuit partitioner and LDF generator and emulation hardware including emulation board and logic analyzer. Technology mapping is consist of three steps such as circuit partitioning and extraction of logic function, minimization of logic function and grouping of logic function. During those procedures, the number of basic logic blocks and maximum levels are minimized by making the output to be assigned in a same block sharing product-terms and input variables as much as possible. Circuit partitioner obtain chip-level netlists satisfying some constraints on routing structure of emulation board as well as the architecture of FPGA chip. A new partitioning algorithm whose objective function is the minimization of the number of interconnections among FPGA chips and among group of FPGA chips is proposed. The routing structure of emulation board take the advantage of complete graph and partial crossbar structure in order to minimize the interconnection delay between FPGA chips regardless of circuit size. logic analyzer display the waveform of probing signal on PC monitor that is designated by user. In order to evaluate the performance of the proposed emulation system, video Quad-splitter, one of the commercial ASIC, is implemented on the emulation board. Experimental results show that it is operated in the real time of 14.3MHz and functioned perfectly.

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Development of Deep Learning Structure for Defective Pixel Detection of Next-Generation Smart LED Display Board using Imaging Device (영상장치를 이용한 차세대 스마트 LED 전광판의 불량픽셀 검출을 위한 딥러닝 구조 개발)

  • Sun-Gu Lee;Tae-Yoon Lee;Seung-Ho Lee
    • Journal of IKEEE
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    • v.27 no.3
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    • pp.345-349
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    • 2023
  • In this paper, we propose a study on the development of deep learning structure for defective pixel detection of next-generation smart LED display board using imaging device. In this research, a technique utilizing imaging devices and deep learning is introduced to automatically detect defects in outdoor LED billboards. Through this approach, the effective management of LED billboards and the resolution of various errors and issues are aimed. The research process consists of three stages. Firstly, the planarized image data of the billboard is processed through calibration to completely remove the background and undergo necessary preprocessing to generate a training dataset. Secondly, the generated dataset is employed to train an object recognition network. This network is composed of a Backbone and a Head. The Backbone employs CSP-Darknet to extract feature maps, while the Head utilizes extracted feature maps as the basis for object detection. Throughout this process, the network is adjusted to align the Confidence score and Intersection over Union (IoU) error, sustaining continuous learning. In the third stage, the created model is employed to automatically detect defective pixels on actual outdoor LED billboards. The proposed method, applied in this paper, yielded results from accredited measurement experiments that achieved 100% detection of defective pixels on real LED billboards. This confirms the improved efficiency in managing and maintaining LED billboards. Such research findings are anticipated to bring about a revolutionary advancement in the management of LED billboards.

A New Image Quality Optimization System for Mobile TFT-LCD (모바일 TFT-LCD를 위한 새로운 화질 최적화 시스템)

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.734-737
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    • 2008
  • This paper presents a new automatic TFT-LCD image quality optimization system. We also have developed new algorithms using 6-point programmable matching technique with reference gamma curve, and automatic power setting sequence. It optimizes automatically gamma adjustment and power setting registers in mobile TFT-LCD driver IC to reduce gamma correction error, adjusting time, and flicker. Developed algorithms and programs are generally applicable for most of the TFT-LCD modules. The proposed optimization system contains module-under-test (MUT, TFT-LCD module), control program, multimedia display tester for measuring luminance and flicker, and control board for interface between PC and TFT-LCD module. The control board is designed with DSP, and it supports various interfaces such as RGB and CPU. Developed automatic image quality optimization system showed significantly reduced gamma adjusting time, reduced flicker, and much less average gamma error than competing system. We believe that the proposed system is very useful to provide high image quality TFT-LCD and to reduce developing process time using optimized gamma-curve setting and automatic power setting.

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Analysis of Technical Review for Domestic Arcade Game in perspective of Global Standard : Towards Rated M Game (국제표준 측면에서 국내 아케이드 게임에 대한 기술심의 분석 : 청소년이용불가 게임을 중심으로)

  • Song, Seong-Keun;Choi, Hun
    • Cartoon and Animation Studies
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    • s.33
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    • pp.551-578
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    • 2013
  • Since October 2006, number of deliberations of arcade game in Game Rating Board (GRB) annually was more than 1,000 cases except 2007 and 2010. However, these cases excessively handle to deliberate the game rating. Especially, the rating is manually performed thus, hindering the consistency and objectivity of the deliberation. To resolve this problems, we think that the automation of technical deliberation is necessary for arcade game which is needed to have much time for deliberation. The purpose of this study is to identify what the possibility part of automation or what obviously part of automation in the deliberation of game rating. To achieve our research purposes, we conducted in-depth interview with GLI standardization expert in BMM Korea and person in charge for deliberation in game rating board. The interview results show that 12 standardization and 14 automation factors for deliberation in game rating of arcade game. This study will expect bases in game development and promotion in game industry.

Filed Programmable Logic Control and Test Pattern Generation for IoT Multiple Object switch Control (사물인터넷 환경에서 다중 객체 스위치 제어를 위한 프로그래밍 가능한 로직제어 및 테스트 패턴 형성)

  • Kim, Eung-Ju;Jung, Ji-Hak
    • Journal of Internet of Things and Convergence
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    • v.6 no.1
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    • pp.97-102
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    • 2020
  • Multi-Channel Switch ICs for IoT have integrated several solid state structure low ON-resistance bi-directional relay MOS switches with level shifter to drive high voltage and they should be independently controlled by external serialized logic control. These devices are designed for using in applications requiring high-voltage switching control by low-voltage control signals, such as medical ultra-sound imaging, ink-jet printer control, bare board open/short and leakage test system using Kelvin 4-terminal measurement method. This paper describes implementation of analog switch control block and its verification using Field programmable Gate Array (FPGA) test pattern generation. Each block has been implemented using Verilog hardware description language then simulated by Modelsim and prototyped in a FPGA board. Compare to conventional IC, The proposed architecture can be applied to fields where multiple entities need to be controlled simultaneously in the IoT environment and the proposed pattern generation method can be applied to test similar types of ICs.

A Study on Development of Integrated System of Ship's Information (선박종합정보시스템의 개발에 관한 연구)

  • Jeong, Tae-Gweon;Park, Soo-Han
    • Journal of Navigation and Port Research
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    • v.31 no.8
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    • pp.645-652
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    • 2007
  • As a method to improve the present operational and safe function in navigation this paper developed an efficient and economical integrated system of ship's information. This system is, systematically and comprehensively, to monitor, save, analyse, and display information on navigation and environment around own ship in real time by connecting one user to another through an on-board LAN or data communication via satellite so that many users on board can obtain simultaneously and easily the information in real time not only in the wheelhouse and engine room but also in many robins and ship's offices. And it consists of four(5) components; data distribution program, database of navigational and engine-related information, multi-functional monitoring program, ship management program and other application program.

ASIC Design of OpenRISC-based Multimedia SoC Platform (OpenRISC 기반 멀티미디어 SoC 플랫폼의 ASIC 설계)

  • Kim, Sun-Chul;Ryoo, Kwang-Ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.281-284
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    • 2008
  • This paper describes ASIC design of multimedia SoC Platform. The implemented Platform consists of 32-bit OpenRISC1200 Microprocessor, WISHBONE on-chip bus, VGA Controller, Debug Interface, SRAM Interface and UART. The 32-bit OpenRISC1200 processor has 5 stage pipeline and Harvard architecture with separated instruction/data bus. The VGA Controller can display RCB data on a CRT or LCD monitor. The Debug Interface supports a debugging function for the Platform. The SRAM Interface supports 18-bit address bus and 32-bit data bus. The UART provides RS232 protocol, which supports serial communication function. The Platform is design and verified on a Xilinx VERTEX-4 XC4VLX80 FPGA board. Test code is generated by a cross compiler' and JTAG utility software and gdb are used to download the test code to the FPGA board through parallel cable. Finally, the Platform is implemented into a single ASIC chip using Chatered 0.18um process and it can operate at 100MHz clock frequency.

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