• Journal of Broadcast Engineering
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• v.8 no.4
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• pp.452-464
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• 2003

In this paper, a multi-view 3D video processor was designed and implemented with several FPGAs for real-time applications. The 3D video processor receives 2D images from cameras (up to 16 cameras) and converts then to 3D video format for space-multiplexed 3D display. It can cope with various arrangements of 3D camera systems (or pixel arrays) and resolutions of 3D display. Tn order to verify the functions of 3D video Processor. some evaluation-board were made with five FPGAs.

• Journal of the Optical Society of Korea
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• v.5 no.2
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• pp.43-48
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• 2001

A three-dimensional (3D) display system based on computer-generated integral photography (CGIP) is proposed and its feasibility is discussed. Instead of the pickup process in conventional If, the elemental images of imaginary objects are computer-generated. Using these images, we observed autostereoscopic 3D images in full color and full parallax. The lateral and depth resolutions of the integrated images are limited by some factors such as the image position, object thickness, the lens width, and the pixel size of display panel.

• Journal of the Optical Society of Korea
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• v.5 no.3
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• pp.117-122
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• 2001

A three-dimensional (3D) display system based on computer-generated integral photography (CGIP) is proposed and its feasibility is discussed. Instead of the pickup process in conventional IP, the elemental images of imaginary objects are computer-generated. Using these images, we observed autostereoscopic 3D images in full color and full parallax. The lateral and depth resolutions of the integrated images are limited by some factors such as the image position, object thickness, the lens width, and the pixel size of display panel.

• Journal of IKEEE
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• v.13 no.4
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• pp.50-56
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• 2009

This paper describes the design of image data transmitter for portable media device for Mobile Display Digital Interface standard. The transmitter uses connection lines to 6 to transmit QVGA image data. In this paper, the transmitter is using only 9 packets for image processing and a state-machine based design is adapted for packet processing. The design was verified using FPGA Xilinx virtex4-LX60. Data rate of the transmitter is 363Mbps with six connection lines. The transferring capability is 30 frame of 24bit RGB 500,000 pixel image data per second.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.575-579
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• 2005

A beautiful, flexible active-matrix electrophoretic display (AM-EPD) device is reported. The flexible AM-EPD device has a $40.0{\times}30.0\;mm^2$ display area, measures about 0.27 mm in thickness, weighs about 0.45 g and possesses only 20 external connections. The flexible AM-EPD device displays clear black-and-white images with 5 gray-scales on $160{\times}120$ pixels. The display is free from residual image problems, because we use an area-gray-scale method on $320{\times}240$ EPD elements, each of which is driven with binary signals. Each pixel consists of 4 EPD elements. In addition, since the response time of the electrophoretic material is as long as approximately 400 ms and since the display possesses a large number of EPD elements, we have developed a special driving method suitable for changing EPD images comfortably. A complete image is formed on the AM-EPD device, consisting of a reset frame and several, typically 6, image frames.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1527-1530
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• 2009

A LCoS micro-display using polymer dispersed liquid crystals (PDLCs) for light switching layer was fabricated. The Si backplane of SVGA ($800{\times}600$) with a pixel size of $14{\times}14mm^2$ was prepared by a $0.35{\mu}m$ 18V CMOS process. PDLCs were filled in the gap between backplane and ITO glass by conventional vacuum filling method. The prepared panels were driven by a field sequential color (FSC) scheme at the frequency of 180Hz and were successful in modulating LED lights to show projection images. The preparation and performance of PDLC-LCoS are presented.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04a
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• pp.42-42
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• 2008

Considerable attention has been focused on the applications of flexible liquid crystal (LC)-based displays because of their many potential advantages, such as portability, durability, light weight, thin packaging, flexibility, and low power consumption. To develop flexible LCDs that are capable of delivering high-quality moving images, like conventional glass-substrate LCDs, the LC device structure must have a stable alignment layer of LC molecules, concurrently support uniform cell gaps, and tightly bind two flexible substrates under external tension. However, stable LC molecular alignment has not been achieved because of the layerless LC alignment, and consequently high-quality images cannot be guaranteed. To solve these critical problems, we have proposed a PDMS pixel-wall based bonding method via the IB irradiation was developed for fasten the two substrates together strongly and maintain uniform cell gaps. The effect of the IB irradiation on PDMS with PI surface was also evaluated by side structure configuration and a result of x-ray photoelectron spectroscopic analysis of PDMS interlayer as a function of binder with substrates. large number of PDMS pixel-walls are tightly fastened to the surface of each flexible substrate and could maintain a constant cell gap between the LC molecules without using any other epoxy or polymer. To enhance the electro-optical performance of the LC device, we applied an alignment method that creates pretilt angle on the PI surface via ion beam irradiation. Using this approach, our flexible LCDs have a contrast ratio of 132:1 and a response time of about 15 ms, resulting in highly reliable electro-optical performance in the bent state, comparable to that of glass-substrate LCDs.

• Journal of the Optical Society of Korea
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• v.20 no.6
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• pp.794-798
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• 2016

A polymer-stabilized vertical alignment (PS-VA) mode with fishbone-shaped pixel electrode structure is mainly used in large-sized liquid crystal displays (LCDs) owing to its advantages such as wide viewing angle, good transmittance and fast response time. One drawback of this mode is a main bone electrode, which crosses in the center of a pixel. It causes the transmittance to decrease badly because LCs cannot be reoriented in this region, and thus, it is particularly unfavorable in an ultra-high-definition LCD. Here, we propose an innovative structure with the main bone electrode relocated to the edge area in a pixel, and investigate how this reverse directed fishbone-shaped pixel electrode structure affects electro-optic characteristics. The proposed structure shows enhanced electro-optic performance, such as the higher transmittance and the faster response time than the conventional VA mode with fishbone-shaped pixel electrode structure.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.6
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• pp.123-131
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• 2009

The emerging display technology has been replaced the previous position of the CRT with the LCD. The nature of hold type display such as LCD, however, causes many problems such as motion blur and motion judder. To resolve the problems, we used frame interpolation technique which improves the image quality by inserting new interpolated frames between existing frames. In this paper, we propose a novel frame interpolation technique that uses dominant MV and variance different value in each block. At first, the proposed algorithm performs unidirectional motion estimation using blocking matching algorithm. The new frame is generated by pixel average using compared block variance or by pixel motion compensation using dominant motion vector, whether the motion estimation find the target area or not. Several experiments with the proposed algorithm shows that the proposed algorithm has better image quality than the existing bidirectional frame interpolation algorithm at the rate of about 3dB PSNR and has low complexity comparing to the unidirectional frame interpolation technique.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.291-292
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• 2014

High-speed video transmission modes of master bridge IC are implemented, which supports MIPI (Mobile Industry Processor Interface) DSI (Display Serial Interface) standard. MIPI DSI master bridge IC sends RGB data and various commands to display module (slave) in order to test it. The master bridge IC consists of buffers storing video data of two lines, packet generation block, and D-PHY layer that distributes packets to data lanes and transmits them to slave. In addition, it supports four bpp (bit per pixel) formats and three transmission modes including Burst and Non-Burst (Sync Events, Sync Pulses types). The designed bridge IC is verified by RTL simulations showing that it functions correctly for various operating parameters.