• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제49권1호
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• pp.54-61
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• 2000

Conventionally, ZVS FB DC/DC converter was controlled by monolithic IC UC3879, which includes the functions of oscillator, error amplifier and phase-shift circuit. Also, microprocessor and DSP have been widely used for the remote control and for the immediate waveform control in ZVS FB DC/DC converter. However the conventional microprocessor controller is complex and difficult to control because the controller consists of analog and digital parts. In the case of the control of FB DC/DC converter, the output is required of driving a direct signal to the switch drive circuits by the digital controller. So, this paper presents the method and realization of designing the digital-to-phase shift PWM circuit controlled by DSP (TMX320C32) in a 2,500A, 40㎾ ZVS FB DC/DC converter.

• 전력전자학회논문지
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• 제25권1호
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• pp.54-60
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• 2020

A digital current control scheme using virtual d-q transformation for a boost single-phase power factor correction (PFC) converter is proposed. The use of virtual d-q transformation in single-phase power converters is known to improve current control performance. However, the conventional virtual d-q transformation-based digital current control scheme cannot be directly applied to the boost single-phase PFC converter because the current and average voltage waveforms of the inductor used in the converter are not sinusoidal. To cope with this problem, this study proposes a virtual sinusoidal signal generation method that converts the current and average voltage waveform of the inductor into a sinusoidal waveform synchronized with the grid. Simulation and experimental results are provided to show that the virtual d-q transformation-based digital current control is successfully applied to the boost single-phase PFC converter with the aid of the proposed virtual sinusoidal signal generation method.

• 전력전자학회논문지
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• 제20권2호
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• pp.167-174
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• 2015

This study describes how digital time delay deteriorates control performance in zero voltage switching (ZVS) phase-shifted full bridge (PSFB) converter. The small-signal model of the ZVS PSFB converter is derived from the buck-converter small-signal model. Digital time delay effects have been considered according to the digital sampling methods. The analysis verifies that digital time delays reduce the stability margin of the converter, and the double sampling technique exhibits better performance than the single sampling technique. Both simulation and experimental results based on 250 W ZVS PSFB confirm the validity of the analyses performed in the study.

• 센서학회지
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• 제28권4호
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• pp.240-245
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• 2019

Phase interpolation is widely adopted in frequency synthesizers and clock-and-data recovery systems to produce an intermediate phase from two existing phases. The intermediate phase is typically generated by combining two input phases with different weights. Unfortunately, this results in non-uniform phase steps. Alternatively, the intermediate phase can be generated by successive approximation, where the interpolated phase at each approximation stage is obtained using the same weight for the two intermediate phases. As a proof of concept, this study presents a 2-GHz 8-bit successive approximation digital-to-phase converter that is designed using 65-nm CMOS technology. The converter receives an 8-phase clock signal as input, and the most significant bit (MSB) section selects four phases to create two sinusoidal waveforms using a harmonic rejection filter. The remaining least significant bit (LSB) section applies the successive approximation to generate the required intermediate phase. Monte-Carlo simulations show that the proposed converter exhibits 0.46-LSB integral nonlinearity and 0.31-LSB differential nonlinearity with a power consumption of 3.12 mW from a 1.2-V supply voltage.

• Journal of Power Electronics
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• 제8권3호
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• pp.201-209
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• 2008

This paper presents the modeling and design of a digital controller for a phase-shifted full-bridge converter (PSFBC) in a discrete-time domain. The discretized PSFBC model is first derived and then analyzed considering the sampling effect and the system parameters. Based on this model, the digital controller is directly designed in a discrete-time domain. The simulation and experimental results are provided to show the validity of the proposed modeling and controller design.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1987년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 16-17 Oct. 1987
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• pp.497-500
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• 1987

A new concept in resolver-to-digital conversion is described, which is based on the digital phase locked loop(DPLL). This converter receives phase modulation and converts it into digital form using time ratio techniques. In this paper, the theories on DPLL and resolver and the design of the converter are covered.

• 전기학회논문지P
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• 제51권1호
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• pp.10-17
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• 2002

Due to the development of information communication field, the interest of the SMPS(Switched Mode Power Supply) is increased. The size and weight of SMPS are decided by inductor, capacitor and transformer. Thus, the low loss converter which is operated in high speed switching is required. The resonant FB DC-DC converter is able to operate in high speed switching and apply to high power field because the switching loss is low. In this thesis, it is proposed to control strategy for constant output power of resonant FB DC-DC converter in variable input voltage. The proposed control system is a digital I-PD type control and apply to phase-shift resonant type controller. The output voltage tracks reference without steady state error in variable input voltage. The validity of proposed control strategy is verified from results of simulation and experiment.

• Journal of Power Electronics
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• 제13권4호
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• pp.600-608
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• 2013

This paper analyzes the effect of the admittance component for the digitally controlled single-phase bridgeless power factor correction (PFC) converter. To do this, it is shown how the digital delay effects such as the digital pulse-width modulation (DPWM) and the computation delays restrict the bandwidth of the converter. After that, the admittance effect of the entire digital control system is analyzed when the bridgeless PFC converter which has the limited bandwidth is connected to the grid. From this, the waveform distortion of the input current is explained and the compensation method for the admittance component is suggested to improve the quality of the input current. Both the simulations and the experiments are performed to verify the analyses taken in this paper for the 1 kW bridgeless PFC converter prototype.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.618-621
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• 1999

With the advent of the high-speed microprocessor and DSP, the possibility of executing a control strategy in digital domain has become a reality. By the use of the DSP and microprocessor controller, many high power drive system may be enhanced resulting in the improved robustness to EMI, the ability to communicate the operating conditions and the ease of adjusting the control parameters. But, the digital controller using DSP or microprocessor is not applied in the high frequency switching power supplies, especially full bridge DC/DC converter. So, this paper presents the method and realization of designing a digital-to-phase shift PWM circuit for full digital controlled full bridge DC/DC converter with zero voltage switching. The operating principles, simulation and experimental results will be presented.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2000년도 특별강연 및 춘계학술발표대회 개요집
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• pp.99-102
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• 2000

Conventionally, ZVS FB DC/DC converter was controlled by monolithic IC UC3879, which includes the functions of oscillator, error amplifier and phase-shift circuit. Also, microprocessor and DSP have been widely used for the remote control and for the immediate waveform control in ZVS FB DC/DC converter. However the conventional microprocessor controller is complex and difficult to control because the controller consists of analog and digital parts. In the case of the control of FB DC/DC converter, the output is required of driving a direct signal to the switch drive circuits by the digital controller. So, this paper presents the method and realization of designing the digital-to-phase shift PWM circuit controlled by DSP (TMX320C32) in a 2,500A, 40㎾ WS FB DC/DC converter.