• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.221-224
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• 2004

This paper has researched on-chip spiral inductor in digital CMOS technology by modeling physical structure based on foundry parameter. To show the possibility of its application to RF design, we designed dual band RF front-end receiver. The simulated receiver have gain of 23/23.5 dB and noise figure of 2.8/3.36 dB at 2.45/5.25 GHz, respectively. It occupies $16mm^2$ in $0.25{\mu}m$ CMOS with 5 metal layer.

• The Journal of the Acoustical Society of Korea
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• v.19 no.2
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• pp.61-67
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• 2000

Recent progress in digital and VLSI technology has offered new possibility fer noticeable advance of hearing aids. Yet, environmental noise remains one of the major problems to hearing aid users. This paper describes results which speech recognition performance and speech discrimination performance was measured for listeners with sensorineural hearing loss, while listeners in speech-band noise. In addition, to ameliorate hearing-aided environments of hearing impaired listeners, environmental noise reduction using speech enhancement techniques are investigated as a front-end of conventional hearing aids. Speech enhancement techniques are implemented in a realtime system equipped with DSP board. The clinical test results suggest that the speech enhancement technique may work in synergy with gain functions fer the greater SNR improvement as the preprocessing algorithm of digital hearing aids.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.1
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• pp.115-121
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• 2004

In this paper, a new distributed intelligent control module based on LonWoks fieldbus for air handling unit(AHU) of heating, ventilating and air-conditioning(HVAC) is proposed to replace with a conventional direct digital control(DDC) system with 32 bit microprocessor. The proposed control architecture has a excellent features such as highly compact and flexible function design, a low priced smart front-end and reliable performance with various functions. This also addresses issues in control network configuration, logical design of field devices by S/W tool, Internet networking and electronic element installation. Experimental results for showing the system performance are also included in this paper.

• Korean Journal of Computational Design and Engineering
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• v.19 no.2
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• pp.148-156
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• 2014

Generally, over 95% of manufacturing cost is determined in the design and manufacturing preparation step, especially a great part of productivity is determined in the manufacturing preparation step. In order to improve the manufacturing competitiveness, we have to verify the problems that can be occurred in the production step and remove the unnecessary factors in the manufacturing preparation step. Thus, manufacturing industries are adopting digital manufacturing system based on modeling & simulation. In this paper, we introduce e-FEED system (electronic based Front End Engineering and Design) that is the integrated design and analysis system for optimized manufacturing line development based on simulation automation and explain the work process (Design, Analysis and Optimization) about manufacturing line development using e-FEED system. Also, the effect is described through the real implementation cases.

• Journal of information and communication convergence engineering
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• v.13 no.4
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• pp.235-240
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• 2015

A decimation chain for multi-standard reconfigurable radios is presented for 900-MHz and 1,900-MHz dual-band cellular standards with a data interpolator based on the Lagrange method for adjusting the variable data rate to a fixed data rate appropriate for each standard. The two proposed configurations are analyzed and compared to provide insight into aliasing and the signal bandwidth by means of a newly introduced measure called interpolation error. The average interpolation error is reduced as the ratio of the sampling frequency to the signal BW is increased. The decimation chain and the multi-rate analog-to-digital converter are simulated to compute the interpolation error and the output signal-to-noise ratio. Further, a method to operate the above-mentioned chain under a compressed mode of operation is proposed in order to guarantee continuous packet connectivity for inter-radio-access technologies. The presented decimation chain can be applied to LTE, WCDMA, GSM multi-mode multi-band digital front-end which will ultimately lead to the software-defined radio.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.3
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• pp.381-389
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• 2015

A fully integrated multistandard multiband CMOS mobile TV tuner with small silicon area and low power consumption is proposed for receiving multiple mobile digital TV signals and FM signal. In order to reduce the silicon area of the multistandard multiband receiver, other RF front-end circuits except LNAs are shared and a local oscillator (LO) signal generation architecture with a single VCO for a frequency synthesizer is proposed. To reduce the low frequency noise and the power consumption, a vertical NPN BJT is used in an analog baseband circuits. The RF tuner IC is implemented in a $0.18-{\mu}m$ CMOS technology. The RF tuner IC satisfies all specifications for DVB-H/T, T-DMB, and ISDB-T with a sufficient margin and a successful demonstration has been carried out for DVB-H/T, T-DMB, and ISDB-T with a digital demodulator.

• Journal of Korea Society of Digital Industry and Information Management
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• v.20 no.2
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• pp.63-74
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• 2024

This Paper presents a resistive wideband fully differential low-noise amplifier (LNA) designed using a noise-cancellation technique for TV tuner applications. The front-end of the LNA employs a cascode common-gate (CG) configuration, and cross-coupled local feedback is employed between the CG and common-source (CS) stages. The moderate gain at the source of the cascode transistor in the CS stage is utilized to boost the transconductance of the cascode CG stage. This produces higher gain and lower noise figure (NF) than a conventional LNA with inductor. The NF can be further optimized by adjusting the local open-loop gain, thereby distributing the power consumption among the transistors and resistors. Finally, an optimized DC gain is obtained by designing the output resistive network. The proposed LNA, designed in SK Hynix 180 nm CMOS, exhibits improved linearity with a voltage gain of 10.7 dB, and minimum NF of 1.6-1.9 dB over a signal bandwidth of 40 MHz to 1 GHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.4B
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• pp.613-623
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• 2000

Digital TV tuner for 8-VSB modulation was developed with satisfying the requirements of ATSC. The double frequency conversion and the active tracking filter in the front-end were used to reduce interference of the adjacent channels and multi-channels, which suppress If beat and image band. However, it was impossible to get frequency mapping between tracking filter and first VCO(Voltage Controlled Oscillator) in the double conversion digital TV tuner differing from conventional NTSC tuner. This paper, therefore, suggests the available structure and a new method for automatic frequency selection by obtaining the mapping of frequency characteristic over tracking voltage and the combined hardware which compose of Micro-controller, EEPROM, D/A(Digital-to-Analog Converter), OP amp and switch driver to solve above problems.

• The Journal of the Acoustical Society of Korea
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• v.18 no.2
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• pp.53-60
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• 1999

In this paper, it is proposed to a new architecture of CMOS IADC(Current-Mode Analog-to-Digital Converter) using 1.5-bit bit cell of which consists a CSH(Current-Mode Sample-and-Hold) and CCMP(Current-Mode Comparator). In order to guarantee the entire linearity of IADC, the CSH is designed to cancel CFT(Clock Feedthrough) whose resolution is to meet at the least 9-bit which is placed in the front-end of each bit cell. In the proposed IADC, digital correction logic is simplified and power consumption is reduced because bit cell of each stage needs two latch CCMP. Also, it is available for a mixed-mode integrated circuit because all of block is designed with only MOS transistor. With the HYUNDAI 0.8㎛ CMOS parameter, the HSPICE simulation results show that the proposed IADC can be operated at 20Ms/s with SNR of 43 dB with which is satisfied 7-bit resolution for input signal at 100 ㎑, and its power consumption is 27㎽.

• Journal of Korean Society for Geospatial Information Science
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• v.18 no.1
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• pp.21-29
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• 2010

Nakdong Estuary Delta plays various roles of worldwide habitat for migratory birds and a sand supplier to Haewoondae Beach and Gwanganri, which are tourist attractions of Busan. In this study, long-term topographical changes of Nakdong Estuary (Jinwoo Islet, Sinja Islet, Doyodeung, Dadae Beach) coast were detected and interpreted. Through the analysis of 34 years' satellite images, it was found out that a part in between front side and back side of Jinwoo Islet increased, Sinja Islet was divided into two belts in 1970, and has formed an islet since the 1980s and extended westward. Due to the rapid development of small islets in front of Baekhabdeung since 1990s, Doyodeung formed in the late 1990s and is still growing. To make coastal map of Nakdong Estuary area, 13 images, of which the tide level was $99{\pm}13cm$, from the 112 Landsat images of the period from 1975 to 2009 were selected to section into water zone and land zone using NDV. And the rates of coastal line change such as MATLAB EPR(End Point Rate) and LRR(Linear Regression Rate) were calculated using DSAS 4.0(Digital Shoreline Analysis System). Through detecting topographical changes, EPR showed that the front(south) and back side(north) of Jinwoo Islet moved southward at -0.93~2.56m/yr, and changes in costal line and area of Jinwoo Islet were low and stable. The front and backside of Sinja Islet moved northward at 1~4m/yr, whereas the west side of Sinja Islet was stable at 2~3m/yr and east side of Sinja Islet moved northward at 10m/yr or faster. The front and back side of Doyodeung moved northward at 18~27m/yr, causing the increase of area, while the coastal line of Dadae Beach moved westward at 7m/yr, causing the expansion of the beach. LRR also demonstrated a similar trend to EPR. Although analysis of satellite images and GIS could enabled detection of topographical changes and quantitative analysis of natural phenomena, we found that continuous observation of natural phenomena and various analytical methods are required.