• Title/Summary/Keyword: Digital error correction

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The Lens Aberration Correction Method for Laser Precision Machining in Machine Vision System (머신비전 시스템에서 레이저 정밀 가공을 위한 렌즈 수차 보정 방법)

  • Park, Yang-Jae
    • Journal of Digital Convergence
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    • v.10 no.10
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    • pp.301-306
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    • 2012
  • We propose a method for accurate image acquisition in a machine vision system in the present study. The most important feature is required by the various lenses to implement real and of the same high quality image-forming optical role. The input of the machine vision system, however, is generated due to the aberration of the lens distortion. Transformation defines the relationship between the real-world coordinate system and the image coordinate system to solve these problems, a mapping function that matrix operations by calculating the distance between two coordinates to specify the exact location. Tolerance Focus Lens caused by the lens aberration correction processing to Galvanometer laser precision machining operations can be improved. Aberration of the aspheric lens has a two-dimensional shape of the curve, but the existing lens correction to linear time-consuming calibration methods by examining a large number of points the problem. How to apply the Bilinear interpolation is proposed in order to reduce the machining error that occurs due to the aberration of the lens processing equipment.

A DLL-Based Multi-Clock Generator Having Fast-Relocking and Duty-Cycle Correction Scheme for Low Power and High Speed VLSIs (저전력 고속 VLSI를 위한 Fast-Relocking과 Duty-Cycle Correction 구조를 가지는 DLL 기반의 다중 클락 발생기)

  • Hwang Tae-Jin;Yeon Gyu-Sung;Jun Chi-Hoon;Wee Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.2 s.332
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    • pp.23-30
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    • 2005
  • This paper describes a DLL(delay locked loop)-based multi-clock generator having the lower active stand-by power as well as a fast relocking after re-activating the DLL. for low power and high speed VLSI chip. It enables a frequency multiplication using frequency multiplier scheme and produces output clocks with 50:50 duty-ratio regardless of the duty-ratio of system clock. Also, digital control scheme using DAC enables a fast relocking operation after exiting a standby-mode of the clock system which was obtained by storing analog locking information as digital codes in a register block. Also, for a clock multiplication, it has a feed-forward duty correction scheme using multiphase and phase mixing corrects a duty-error of system clock without requiring additional time. In this paper, the proposed DLL-based multi-clock generator can provides a synchronous clock to an external clock for I/O data communications and multiple clocks of slow and high speed operations for various IPs. The proposed DLL-based multi-clock generator was designed by the area of $1796{\mu}m\times654{\mu}m$ using $0.35-{\mu}m$ CMOS process and has $75MHz\~550MHz$ lock-range and maximum multiplication frequency of 800 MHz below 20psec static skew at 2.3v supply voltage.

A Study on the Parameter Measurement of Three Phase Brushless DC Moto (삼상 브러시리스 직류전동기의 파라미터 측정에 관한 연구)

  • 임영철;장영학;조경영;정영국
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.5 no.3
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    • pp.54-63
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    • 1991
  • This paper describes an effort to develope a microcomputer-based parameter measurement system for a brushless DC motor. Back EMF equation is derived from back EMF waveform of a brushless DC motor. To minimize error the due to the ripple component in the measured armature current, digital averaging filter is employed. The whole identification process of signal generation, measurement parameter determination is fully automated. A new identification algorithm for the brushless DC motor parameters is developed. New parameter correction method is proposed using the deadzone current and the time to reach the peak current. In the proposed correction method, the measured current is in excellent agreement with the estimated current.

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Spatial Interpolation of Meteorologic Variables in Vietnam using the Kriging Method

  • Nguyen, Xuan Thanh;Nguyen, Ba Tung;Do, Khac Phong;Bui, Quang Hung;Nguyen, Thi Nhat Thanh;Vuong, Van Quynh;Le, Thanh Ha
    • Journal of Information Processing Systems
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    • v.11 no.1
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    • pp.134-147
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    • 2015
  • This paper presents the applications of Kriging spatial interpolation methods for meteorologic variables, including temperature and relative humidity, in regions of Vietnam. Three types of interpolation methods are used, which are as follows: Ordinary Kriging, Universal Kriging, and Universal Kriging plus Digital Elevation model correction. The input meteorologic data was collected from 98 ground weather stations throughout Vietnam and the outputs were interpolated temperature and relative humidity gridded fields, along with their error maps. The experimental results showed that Universal Kriging plus the digital elevation model correction method outperformed the two other methods when applied to temperature. The interpolation effectiveness of Ordinary Kriging and Universal Kriging were almost the same when applied to both temperature and relative humidity.

An 8-b 1GS/s Fractional Folding CMOS Analog-to-Digital Converter with an Arithmetic Digital Encoding Technique

  • Lee, Seongjoo;Lee, Jangwoo;Lee, Mun-Kyo;Nah, Sun-Phil;Song, Minkyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.5
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    • pp.473-481
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    • 2013
  • A fractional folding analog-to-digital converter (ADC) with a novel arithmetic digital encoding technique is discussed. In order to reduce the asymmetry errors of the boundary conditions for the conventional folding ADC, a structure using an odd number of folding blocks and fractional folding rate is proposed. To implement the fractional technique, a new arithmetic digital encoding technique composed of a memory and an adder is described. Further, the coding errors generated by device mismatching and other external factors are minimized, since an iterating offset self-calibration technique is adopted with a digital error correction logic. A prototype 8-bit 1GS/s ADC has been fabricated using an 1.2V 0.13 um 1-poly 6-metal CMOS process. The effective chip area is $2.1mm^2$(ADC core : $1.4mm^2$, calibration engine : $0.7mm^2$), and the power consumption is 88 mW. The measured SNDR is 46.22 dB at the conversion rate of 1 GS/s. Both values of INL and DNL are within 1 LSB.

Analysis on the error performance objective for turbo codes in the DVB-RCS system (DVB-RCS 시스템에서 터보 부호의 오류성능 목표 분석)

  • Yeo, Seong-Mun;Kim, Su-Yeong
    • Journal of Satellite, Information and Communications
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    • v.1 no.2
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    • pp.51-55
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    • 2006
  • Digital satellite communication systems are usually integrated with terrestrial systems to provide various services. In these cases, they should satisfy the performance objectives defined by the terrestrial systems. Recommendation ITU-R S.1062 specifies the error performance objectives of digital satellite communication systems operating below 15 GHz. The error performance are given in terms of bit error probability divided by the number of the average bit errors in the burst ($\alpha$). This paper presents a theoretical method to estimate $\alpha$ that is a very important parameter in the satellite communication systems to analyze the error performance objectives. We show performance estimation result of DVB-RCS turbo code using the presented method, and verify them by comparing to the simulation results.

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Bit Interleaver Design of Ultra High-Order Modulations in DVB-T2 for UHDTV Broadcasting (DVB-T2 기반의 UHDTV 방송을 위한 초고차 성상 변조방식의 비트 인터리버 설계)

  • Kang, In-Woong;Kim, Youngmin;Seo, Jae Hyun;Kim, Heung Mook;Kim, Hyoung-Nam
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.4
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    • pp.195-205
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    • 2014
  • The ultra-high definition television (UHDTV) has been considered as a next generation broadcsating service. However the conventional digital terrestrial transmission system cannot afford the required transmission data rate of UHDTV, and thus adopting ultra-high order constellation, such as 4096-QAM, into the conventional DTT systems has been studied. In particular, when the ultra-high order constellation is adopted into the digital video broadcasting-2nd generation terrestrial (DVB-T2) unequal-error protection (UEP) properties of a codeword of an error correction coding and ultra-high order constellations should be properly matched by bit mapper in order to enhance the decoding performance. Because long codeword results in a heavy computational complexity to design the bit mapper, the DVB-T2 divided it into cascaded blocks, the bit interleaver and the bit-to-cell DEMUX, and there have been many researches related to each block. However, there are few published study related to design methodology of bit interleaver. In this respect, this paper proposes a design methodology of the bit interleaver and presents bit interleavers of 1024-QAM and 4096-QAM according to the proposed design algorithm. The newly designed interleavers improved the decoding performance of the error correction coding by maximally 0.6 dB SNR over both of AWGN and random fading channel.

Error Correction Scheme in Location-based AR System Using Smartphone (스마트폰을 이용한 위치정보기반 AR 시스템에서의 부정합 현상 최소화를 위한 기법)

  • Lee, Ju-Yong;Kwon, Jun-Sik
    • Journal of Digital Contents Society
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    • v.16 no.2
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    • pp.179-187
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    • 2015
  • Spread of smartphone creates various contents. Among many contents, AR application using Location Based Service(LBS) is needed widely. In this paper, we propose error correction algorithm for location-based Augmented Reality(AR) system using computer vision technology in android environment. This method that detects the early features with SURF(Speeded Up Robust Features) algorithm to minimize the mismatch and to reduce the operations, and tracks the detected, and applies it in mobile environment. We use the GPS data to retrieve the location information, and use the gyro sensor and G-sensor to get the pose estimation and direction information. However, the cumulative errors of location information cause the mismatch that and an object is not fixed, and we can not accept it the complete AR technology. Because AR needs many operations, implementation in mobile environment has many difficulties. The proposed approach minimizes the performance degradation in mobile environments, and are relatively simple to implement, and a variety of existing systems can be useful in a mobile environment.

The Pilot Production of Topographic-Cadastral Maps and Its Applications in Korea

  • Park, Yun-Soo;Park, Byung-Uk
    • Korean Journal of Geomatics
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    • v.1 no.1
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    • pp.51-59
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    • 2001
  • The Government confirmed the action planning of digital mapping project for major thematic maps based on ‘Revised Plan for The Development of the National Geographic Information System’(NGIS). Mapping for major thematic maps was begun in 1998 when digital mapping project for topographic maps finished due to the delay of the action planning, and will selectively have produced the essential digital thematic maps according to the frequency of usage. The models of topographic-cadastral maps and administrative boundary maps around Suwon were produced in accordance with the presented draft. We presented specification for production of the most appropriate topographic-cadastral maps and administrative boundary maps through the analysis of the process of production, discussion and error check, and correction of the produced topographic-cadastral maps and administrative boundary maps. And we could make it easier to develop digital mapping project of topographic-cadastral maps and administrative boundary maps effectively by presenting the strategy for data input and maintenance, the cost model for carrying out the digital thematic map production, digital topographic maps, and the supplement of data model and data format. Topographic-cadastral maps has a wide range of usage but a lot of difficulties in the process of production and map update under use. So it seems that the study on users, university, private sector and municipal self-government must follow for promoting the use of topographic-cadastral maps.

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Production of Topographic-Cadastral Map Using Digital Topographic Map (수치지형도를 활용한 지형.지번도 제작방안)

  • 최윤수;이석용
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.18 no.3
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    • pp.241-250
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    • 2000
  • The Government confirmed the action planning of digital mapping project for major thematic maps based on‘Revised Plan for The Development of the National Geographic Information System’(NGIS). Mapping for major thematic maps will selectively have produced the essential digital thematic maps according to the frequency of usage by the year of 2000. The models of topographic-cadastral maps around Suwon were produced in accordance with the presented draft. We presented specification for production of the most appropriate topographic-cadastral maps through the analysis of the process of production, discussion and error check, and correction of the produced topographic-cadastral maps. And we could make it easier to develop digital mapping project of topographic-cadastral maps effectively by presenting the strategy for data input and maintenance, the cost model for carrying out the digital thematic map production, digital topographic maps, and the supplement of data model and data format.

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