• Title/Summary/Keyword: Digital channel amplifier

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Two-stage Adaptive Digital AGC Method for SDR Radio (SDR 통신장비를 위한 2단계 적응형 Digital AGC 기법)

  • Park, Jong-Hun;Kim, Young-Je;Cho, Jung-Il;Cho, Hyung-Weon;Lee, Young-Po;Yoon, Seok-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.6C
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    • pp.462-468
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    • 2012
  • In this paper, an adaptive digital automatic gain control(AGC) algorithm with two stages is proposed. AGC technique is crucial for mobile communication equipment because path loss in wireless channel and gain fluctuation in receiver front-end continuously change the received signal strength. Furthermore, adaptive criteria should be applied to the design of AGC algorithm in order to support many waveforms with one SDR communication device. With these reasons, a two-stage structure is proposed to satisfy both flexibility and adaptiveness. Compared with conventional method, it also requires shorter convergence time. Numerical results show that the gain value of variable gain amplifier(VGA) is converged within proper time and proposed scheme controls the input level of analog to digital converter(ADC) to be stable during long range of time.

Real-Time Respiration and Heartbeat Detector Using a Compact 1.6 GHz Single-Channel Doppler Sensor (소형화된 1.6 GHz 단일 채널 도플러 센서를 이용한 실시간 호흡 및 심장 박동 감지기)

  • Lee, Hyun-Woo;Park, Il-Ho;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.4 s.119
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    • pp.379-388
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    • 2007
  • This paper presents a real-time respiration and heartbeat detector comprised of a 1.6 GHz single-channel Doppler sensor and analog/digital signal processing block for remote vital sign detection. The RF front end of the Doppler sensor consists of an oscillator, mixer, low noise amplifier, branch-line hybrid and patch antenna. We apply artificial transmission lines(ATLs) to the branch-line hybrid, which leads to a size reduction of 40 % in the hybrid, while its performance is very comparable to that of a conventional hybrid. The analog signal conditioning block is implemented using second order Sallen-Key active filters and the digital signal processing block is realized with a LabVIEW program on a computer. The respiration and heartbeat detection is demonstrated at a distance of 50 cm using the developed system.

Active-RC Channel Selection Filter with 40MHz Bandwidth and Improved Linearity (개선된 선형성을 가지는 R-2R 기반 5-MS/s 10-비트 디지털-아날로그 변환기)

  • Jeong, Dong-Gil;Park, Sang-Min;Hwang, Yu-Jeong;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.1
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    • pp.149-155
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    • 2015
  • This paper proposes 5-MS/s 10-bit digital-to-analog converter(DAC) with the improved linearity. The proposed DAC consists of a 10-bit R-2R-based DAC, an output buffer using a differential voltage amplifier with rail-to-rail input range, and a band-gap reference circuit for the bias voltage. The linearity of the 10-bit R-2R DAC is improved as the resistor of 2R is implemented by including the turn-on resistance of an inverter for a switch. The output voltage range of the DAC is determined to be $2/3{\times}VDD$ from an rail-to-rail output voltage range of the R-2R DAC using a differential voltage amplifier in the output buffer. The proposed DAC is implemented using a 1-poly 8-metal 130nm CMOS process with 1.2-V supply. The measured dynamic performance of the implemented DAC are the ENOB of 9.4 bit, SNDR of 58 dB, and SFDR of 63 dBc. The measured DNL and INL are less than +/-0.35 LSB. The area and power consumption of DAC are $642.9{\times}366.6{\mu}m^2$ and 2.95 mW, respectively.

Design of Digital Signal Processor for Ethernet Receiver Using TP Cable (TP 케이블을 이용하는 이더넷 수신기를 위한 디지털 신호 처리부 설계)

  • Hong, Ju-Hyung;SunWoo, Myung-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.8A
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    • pp.785-793
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    • 2007
  • This paper presents the digital signal processing submodule of a 100Base-TX Ethernet receiver to support 100Mbps at TP cable channel. The proposed submodule consists of programmable gain controller, timing recovery, adaptive equalizer and baseline wander compensator. The measured Bit Error Rate is less than $10^{-12}BER$ when continuously receiving data up to 150m. The proposed signal processing submodule is implemented in digital circuits except for PLL and amplifier. The performance improvement of the proposed equalizer and BLW compensator is measured about 1dB compared with the existing architecture that removes BLW using errors of an adaptive equalizer. The architecture has been modeled using Verilog-HDL and synthesized using samsung $0.18{\mu}m$ cell library. The implemented digital signal processing submodule operates at 142.7 MHz and the total number of gates are about 128,528.

Development of a battery management system(BMS) simulator for electric vehicle(EV) cars (EV용 배터리 관리시스템(BMS) 시뮬레이터 개발)

  • Park, Chan-Hee;Kim, Sang-Jung;Hwang, Ho-Suk;Lee, Hee-Gwan
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.6
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    • pp.2484-2490
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    • 2012
  • This study reports on the development and performance verification of cell simulation boards of simulator and the embedded program for board control of the battery management system (BMS) of electric vehicle (EV) cars, which manages the next-generation automotive lithium-ion battery pack. Here, we have improved the speed of the simulator by using operational (OP) amplifier and transistors that were connected in series. In addition, using a digital analog converter (DAC) in each channel, we have improved the performance by channel-to-channel isolation (isolation) as compared to the traditional methods. Furthermore, by constructing a current-limiting protection circuit, one can be protected from disturbance and, by utilizing a precision shunt resistor for the current sensor, we have increased the precision of the current control. In order to verify the performance of the developed simulator, we have performed the experiment 10 times, with values ranging from 0.5 V to 5 V, and a voltage drop step of 0.5 V. Significance analysis of experimental data, and repeatability tests were performed, showing an average standard deviation of 0.001~0.004 V, indicating high repeatability and high statistical significance of the current method and system.

Design and Fabrication of the Ka-Band Receive Module for Millimeter Wave Seeker (밀리미터파 탐색기를 위한 Ka-대역 수신기 모듈의 설계 및 제작)

  • Yang, Seong-Sik;Lim, Ju-Hyun;Song, Sung-Chan
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.49 no.1
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    • pp.78-84
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    • 2012
  • In this paper, we introduced the design technique about a Ka band receive module for millimeter wave seekers. The receiver module consists of a waveguide, circulator and transition for antenna connection, and a limiter and gain control amplifier for receiver protection. This module is comprised of a sum, azimuth and elevation channel for receiving monopules signal, and a SLB channel for the acquisition of jamming signal. In this paper, receiver gain and range of gain control dependent on ADC nonlinear characteristic was analyzed and designed for wide dynamic range receive. In the test result of the fabricated Ka-band receive, the frequency band is 1 GHz, the noise figure is as low as 8.2 dB, the gain is $56{\pm}2dB$, the dynamic range is 135 dB, the gain congtrol is more than 86 dB, the channel isolation is more than 35 dB.

Design of Computer Access Devices for Severly Motor-disability Using Bio-potentials (생체전위를 이용한 중증 운동장애자들을 위한 컴퓨터 접근제어장치 설계)

  • Jung, Sung-Jae;Kim, Myung-Dong;Park, Chan-Won;Kim, Il-Hwan
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.55 no.11
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    • pp.502-510
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    • 2006
  • In this paper, we describe implementation of a computer access device for the severly motor-disability. Many people with severe motor disabilities need an augmentative communication technology. Those who are totally paralyzed, or 'locked-in' cannot use conventional augmentative technologies, all of which require some measure of muscle control. The forehead is often the last site to suffer degradation in cases of severe disability and degenerative disease. For example, In ALS(Amyotrophic Lateral Sclerosis) and MD(Muscular dystrophy) the ocular motorneurons and ocular muscles are usually spared permitting at least gross eye movements, but not precise eye pointing. We use brain and body forehead bio-potentials in a novel way to generate multiple signals for computer control inputs. A bio-amplifier within this device separates the forehead signal into three frequency channels. The lowest channel is responsive to bio-potentials resulting from an eye motion, and second channel is the band pass derived between 0.5 and 45Hz, falling within the accepted Electroencephalographic(EEG) range. A digital processing station subdivides this region into eleven components frequency bands using FFT algorithm. The third channel is defined as an Electromyographic(EMG) signal. It responds to contractions of facial muscles and is well suited to discrete on/off switch closures, keyboard commands. These signals are transmitted to a PC that analyzes in a time series and a frequency region and discriminates user's intentions. That software graphically displays user's bio-potential signals in the real time, therefore user can see their own bio-potentials and control their physiological signals little by little after some training sessions. As a result, we confirmed the performance and availability of the developed system with experimental user's bio-potentials.

A 12b 100 MS/s Three-Step Hybrid Pipeline ADC Based on Time-Interleaved SAR ADCs

  • Park, Jun-Sang;An, Tai-Ji;Cho, Suk-Hee;Kim, Yong-Min;Ahn, Gil-Cho;Roh, Ji-Hyun;Lee, Mun-Kyo;Nah, Sun-Phil;Lee, Seung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.2
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    • pp.189-197
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    • 2014
  • This work proposes a 12b 100 MS/s $0.11{\mu}m$ CMOS three-step hybrid pipeline ADC for high-speed communication and mobile display systems requiring high resolution, low power, and small size. The first stage based on time-interleaved dual-channel SAR ADCs properly handles the Nyquist-rate input without a dedicated SHA. An input sampling clock for each SAR ADC is synchronized to a reference clock to minimize a sampling-time mismatch between the channels. Only one residue amplifier is employed and shared in the proposed ADC for the first-stage SAR ADCs as well as the MDAC of back-end pipeline stages. The shared amplifier, in particular, reduces performance degradation caused by offset and gain mismatches between two channels of the SAR ADCs. Two separate reference voltages relieve a reference disturbance due to the different operating frequencies of the front-end SAR ADCs and the back-end pipeline stages. The prototype ADC in a $0.11{\mu}m$ CMOS shows the measured DNL and INL within 0.38 LSB and 1.21 LSB, respectively. The ADC occupies an active die area of $1.34mm^2$ and consumes 25.3 mW with a maximum SNDR and SFDR of 60.2 dB and 69.5 dB, respectively, at 1.1 V and 100 MS/s.

A Study of Mid-sized Communication Satellite in Korea (국내 중형 통신위성의 발전 방안)

  • Woo, Hyung Je;Lee, Daeil;Han, Sang Woo
    • Journal of Satellite, Information and Communications
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    • v.11 no.3
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    • pp.104-109
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    • 2016
  • A technology of GEO satellite communications starts from Koreasat program in Korea. Payload equipment of EQM Ku and Ka band transponders had been developed and space-qualified Ka band payload in COMS was successfully launched in June, 2010. For the purpose of military communications, Dehop-Rehop transponder was developed in Koreasat5 as ANASIS system and DAT(Digital Active Transponder) and DCAMP(Digital Channel AMPlifier) transponders are now under development. In this paper, from the study of military satellite communications trend, a direction of military communication satellite is suggested based on the current GEO SATCOM technologies in Korea. Considering the limit of frequency resources, a technology of battlefield adaptive transponder with medium capacity against high moveable jamming tactics would be efficient for the future military SATCOM system. Mid-sized military satellites with frequency hopping and mid-capacity transponders can be a solution of vitalizing the GEO satellite programs.

Study on Thermal Vacuum Test Result of DCAMP by the Analysis of Derating & Gain Control (디지털중계기의 부하경감 및 이득조정기능 분석을 통한 열진공시험결과 성능분석)

  • Jin, Byoung-Il;Ko, Hyun-Seok
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.43 no.1
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    • pp.72-78
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    • 2015
  • Recently, the usage of the satellite is increased more and more in the areas that are communication, weather, marine, optical, radar etc. The functions of the Satellite are evolving from passive transponder to active transponder by the developing of a technology. Advanced countries in satellites install the DCAMP for increase of bandwidth efficiency, improvement of QoS by interference rejection. DCAMP includes many digital components in order to implement functions. Thus, these kinds of active transponders consume much more power compared to passive transponder and then increase the heat. In this paper, we discuss the TVAC test result of DCAMP in EQM(Engineering Qualification Model) level. The paper shows the test results of digital gain control in order to verify DCAMP status under the TVAC test. In addition, the temperature and heat condition of main components from viewpoint of derating will be treated through the official environment test for qualification.