• International journal of advanced smart convergence
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• v.13 no.1
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• pp.57-68
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• 2024

In this paper, we are interested in how creator economy startups allowing creators to make money from doing that they love. So, we look at European creator economy startups among Web3.0 business model landscape surveyed in 2022, because the US is home of Web2.0 giant platforms like YouTube. Totally seventeen European startups are investigated, and the theoretical logic is the disruptive innovation. We firstly review the survey published in 2022 and utilize the theory of the disruptive innovation to design the research framework including questions with each type of the disruptive innovation. In this paper, we firstly show, Kalao and Gem as NFT ecosystem platforms aim at service convenience. Secondly, Talkbase, Passionfroot, Bildr, Customuse, and Earnr aim at providing creator tools for under-skilled customers. Lastly, when it comes direct monetization with a decentralized business model, CrowdPad, Admix, GOALS, Realm, Dropstar, Pianity, Sonomo, Stage11, Miiji, and ReadyPlayerMe are representative. Despite the relatively small data size, the results are meaningful as they contribute to a more profound comprehension of the Web3.0 business models and offer guidance for future research directions.

• Proceedings of the Korea Information Processing Society Conference
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• 2007.05a
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• pp.625-628
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• 2007

갈수록 복잡화, 대량화되고 있는 시스템의 성능은 유지하면서 User Response Time 을 단축시키는 Tuning 은 투자 대비 이익률(ROI : Return On Investment)에 탁월한 효과를 가져온다는 점에서 중요시 되고 있다. 본 연구는 SAP R/3 System 환경에서 Tuning 통한 User Response Time 감소를 위하여 Query 분석 및 Table Index 생성, Program Logic 수정, Parallel Processing, SAP R/3 System 의 고유 기능인 Notes 적용을 통한 User Response Time 감소 기법을 제시한다.

• The KIPS Transactions:PartC
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• v.8C no.1
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• pp.32-40
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• 2001

In this paper, we propose a high-speed modular multiplication algorithm which revises conventional Montgomery's algorithm. A hardware architecture is also presented to implement 1024-bit RSA cryptosystem for digital signature based on the proposed algorithm. Each iteration in our approach requires only one addition operation for two n-bit integers, while that in Montgomery's requires two addition operations for three n-bit integers. The system which is modelled in VHDL(VHSIC Hardware Description Language) is simulated in functionally through the use of $Synopsys^{TM}$ tools on a Axil-320 workstation, where Altera 10K libraries are used for logic synthesis. For FPGA implementation, timing simulation is also performed through the use of Altera MAX + PLUS II. Experimental results show that the proposed RSA cryptosystem has distinctive features that not only computation speed is faster but also hardware area is drastically reduced compared to conventional approach.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.8
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• pp.106-112
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• 1998

Recently, the amount of image and audio data has been increasing dramatically for high performance. According to this trend, a high-density magnetic recording system is necessitated and the tracks of magnetic tapes are getting narrower. This, in turn, requires the capstan servo system of the magnetic recording system such as DVCR to control precisely the speed and position of the capstan motor. Especially, in case of play-back, the capstan servo system should be able to position and maintain the head on the desired place of the track. To meet this requirement, digital camcorders use ATF (Automatic Track Following). In this paper, a new ATF block using discrete Fourier transform is proposed. The proposed ATF block was designed and implemented in ALTERA FPGA chips and fully tested in a real DVCR system. It is shown through experiments that the new ATF block is more cost-effective than other existing ATF blocks using digital lowpass filters. In particular, the number of logic gates can be reduced by 20% in average, compared to the existing ATF's.

• Archives of design research
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• v.13 no.1
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• pp.157-166
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• 2000

Since the cognitive science developed as a brandl of academic researdl, studies on human brains have flourished. Emotional features have been centered on the field of design, and the development of the design process has been diversified that makes use of the factors. The purpose of this study is to reflect the current trend and to convert the results into a method for designing. The researdl is based on the mind map techniques which spread like a trendy fashion, and tries to supply a theoretical explanation of how to overcome the fixed idea. Recognizing the importance of learned information in approaching a problem, I regarded the roles of left and right brain as analogue and digital images interpreting them by freely crossing language(digital images) and visual thought (analogue images), using mapping tedlniques. I pursued the research goal of the techniques focusing on the idea of using mapping. As a result of this. I established a logic system [figure 8] in that a proposition which starts as a problem introduction goes on until a problem solution, which is visualized with concept presentation, using a brainstorming technique. According to the suggested concept. I concluded that idea proliferation as a design demand can be solved by applying mapping techniques like one shown in figure 12.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.8
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• pp.2064-2071
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• 1998

A new digital clock level translator has been designed in order to produce a clock source of the internal logic circuits. The translator output has 50% duty ratio from small sinusoidal input such as TCXO which oscillates itself in poratable components. The circuit consists of positive and negative comparators, RS latch, charge pump, and reference vol- tage generator. It detects pulse width of the output waveform and feedbacks the control signal to the input com-parator. It detects pulse width of the output waveform and feedbacks the control signal to the input com-parator reference, producing output waveform with valid 50% duty ratio of the digital signal level. The designed level translator can be used as a sampling clock source of ADC, PLL and the colck source of the clock synthesizer. The circuit wasdesigned in a 0.8.mu.m analog CMOS technology with double metal, double poly, and BSIM3 circuit simulation model. From our experimental results, a stable operating characteristics of 50 +3% duty ratio was obtained from the sinusoidal input wave of 370 mV.

• Journal of Digital Convergence
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• v.13 no.1
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• pp.177-184
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• 2015

Modern society is rapidly going digital as blowing hot air about it Convergence castration. Iran fusion product management, technology, and services such as free from black-and-white logic of various activities such as management of alternative recognition by further series of management innovation in the way of trying to fill the other gaps win-win. In addition, the company is to survive through the creation and unceasing. Performance of firms in contemporary globalization, which is still more sensitive. In this study, based on the fusion needs of the enterprise and explores how this convergence competencies affect to business performance. Results showed that the fusion capacity is affecting the financial performance and non-financial performance. That fusion technology education learning capability and convergence capabilities appeared to affect the financial performance and non-financial performance.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.11
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• pp.57-65
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• 2014

This paper presents a framework that is based on a reconfigurable macro-model of current-mode logic (CML) high-speed digital circuits enabling equation-based design optimization. The proposed macro-model is compatible with geometric programming, thereby enabling constraint-driven top-level power optimization. The proposed optimization framework is applied to a design of CML based serial-link transmitter with user-defined design specifications as an example of high speed digital circuits using 45nm and 90nm CMOS technology. The proposed optimization framework can derive a design with optimal power efficiency for given transistor technology nodes.

• Journal of the Korean Institute of Landscape Architecture
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• v.30 no.1
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• pp.1-10
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• 2002

The purpose of this article is to examine land use change in the fringe area of a metropolitan city through multi-temporal data analysis. Change detection has been regarded as one of the most important applications for utilization of remotely sensed imageries. Conventionally, two images were used for change detection, and Arithmetic calculators were generally used on the process. Meanwhile, multi-temporal change detection for a large number of images has been carried out. In this paper, a digital land-use map and three Landsat TM data were utilized for the multi-temporal change detection Each urban area map was extracted as a base map on the process of multi-temporal change detection. Each urban area map was converted to bit image by using boolean logic. Various urban change types could be obtained by stacking the urban area maps derived from the multi-temporal data using Geographic Information System(GIS). Urban change type map was created by using the process of piling up the bit images. Then the urban change type map was compared with each land cover map for the change detection. Dalseo-gu of Daegu city and Hwawon-eup of Dalsung-gun, the fringe area of Daegu Metropolitan city, were selected for the test area of this multi-temporal change detection method. The districts are adjacent to each other. Dalseo-gu has been developed for 30 yeais and so a large area of paddy land has been changed into a built-up area. Hwawon-eup, near by Dalseo-gu, has been influenced by the urbanization of Dalseo-gu. From 1972 to 1999, 3,507.9ha of agricultural area has been changed into other land uses, while 72.7ha of forest area has been altered. This agricultural area was designated as a 'Semi-agricultural area'by the National landuse Management Law. And it was easy for the preserved area to be changed into a built-up area once it would be included as urban area. Finally, the method of treatment and management of the preserved area needs to be changed to prevent the destruction of paddy land by urban sprawl on the urban fringe.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.3
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• pp.68-74
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• 2008

The Ubiquitous Society is being attained gradually as it got through the step of super-high speed internet mobile and digital convergence. Now, it is being variously spread to no only the little ordinaries of communication but also fields of economy and industry. Specially, RFID and Navigation are being issued at home and foreign. These are prospected to give assistances that it bring along the competitive power of nation. But inflection range of RFID and Navigation is localized in the most sin lest. This paper proposes system to reflect the individual and special quality using RFID and Navigation and to fit easily changing environment. And we studied to use what kinds of information in the special environment. We used Fuzzy Logie and TSP for making the intelligent navigation system with more information.