• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2359-2368
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• 2013

In this paper, an IRD (internal read data) circuit preventing the reentry into the read mode while keeping the read-out DOUT datum at power-up even if noise such as glitches occurs at signal ports such as an input signal port RD (read) when a power IC is on, is proposed. Also, a pulsed WL (word line) driving method is used to prevent a DC current of several tens of micro amperes from flowing into the read transistor of a differential paired eFuse OTP cell. Thus, reliability is secured by preventing non-blown eFuse links from being blown by the EM (electro-migration). Furthermore, a compared output between a programmed datum and a read-out datum is outputted to the PFb (pass fail bar) pin while performing a sensing margin test with a variable pull-up load in consideration of resistance variation of a programmed eFuse in the program-verify-read mode. The layout size of the 8-bit eFuse OTP IP with a $0.18{\mu}m$ process is $189.625{\mu}m{\times}138.850{\mu}m(=0.0263mm^2)$.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.1
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• pp.40-48
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• 2000

1A novel bipolar linear transconductor and its application to operational transconductance amplifier(OTA) for low-voltage low-power signal processing is proposed. The transconductor consists of a npn differential-pair with emitter degeneration resistor and a pnp differential-pair connected to the npn differential-pair in cascade. The bias current of the pnp differential-pair is used with the output current of the npn differential-pair for wide linearity and temperature stability. The OTA consists of the linear transconductor and a translinear current cell followed by three current mirrors. The proposed transconductor has superior linearity and low-voltage low-power characteristics when compared with the conventional transconductor. The experimental results show that the transconductor with transconductance of 50 ${\mu}S$ has a linearity error of less than ${\pm}$0.06% over an input voltage range from -2V to +2V at supply voltage ${\pm}$3V. Power dissipation of the transconductor was 2.44 mW. A prototype OTA with a transconductance of 25 ${\mu}S$ has been built with bipolar transistor array. The linearity of the OTA was same as the proposed transconductor. The OTA circuit also exhibits a transconductance that is linearly dependent on a bias current varying over four decades with a sensitivity of 0.5 S/A.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.143-152
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• 2004

A novel low-power wideband bipolar second-generation current conveyors(CCIIs) and its application to universal instrumentation amplifier(UIA) were proposed. The CCII for accuracy voltage or current transfer characteristics and low current input impedance adopted adaptive current bias circuit into conventional class Ab CCII. The UIA consists of only two CCIIs and four resistors. Three instrumentation function of the UIA can be realized by selection of input signals and resistors. The simulation results show that the CCII has input impedance of 2.0$\Omega$ and the voltage gain of 60㏈ for frequency range from 0 to 50KHz when used as a voltage amplifier. The CCII has also good characteristics of current follower for current range from -100㎃ to ＋100㎃. The simulation results show that the UIA has three instrumentation amplifier functions without resistor matching. The UIA has the voltage gain of 40㏈ for frequency range from 0 to 100KHz when used as a fully-differential instrumentation amplifier. The power dissipations of the CCII and the UIA are 0.75㎽ and 1.5㎽ at supply voltage of $\pm$2.5V, respectively.

• Journal of Advanced Navigation Technology
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• v.21 no.6
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• pp.651-658
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• 2017

There were many studies on the development of radiation measuring instruments to detect the presence of radiation. In particular, the signal processing method and treatment without loss of the detection signal are very important. The common feature for these studies is the peak-hold method that keeps the peak value of input signal uniform for a short time, readouts its value, discharges electrical value, and then waits for next signal. We propose the new methodology to capture the pulse peak value from the radiation detector and read the value directly other than peak-hold method. This method has merit of accurate reading the input signal pulse peak value without complicate process of holding for a period or initializing of input signal, and then be verified to be adequate through simulation of actual example.

• Journal of Korean Society for Geospatial Information Science
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• v.6 no.2 s.12
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• pp.81-90
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• 1998

With the high demand for Geographic Information System and the diversification of Spatial Information, it has been required a rapid and accurate input system, updating system and an efficient field survey system to organize database for thematic mapping. Following the purpose, several indispensable modules have to be Invented to build a GPS Lap-top Computer System using low cost GPS receivers. These modules include such as an interface module between GPS receivers and lap-top computers, a data processing module for standalone GPS or Real-time Differential GPS, a module to input or amend digital map and to transfer three-dimensional coordinates in real-time, and finially a module to enter attribute value and feature code based on standard specification of digital maps for controlling position and attribute data. In this paper, it Is presented the efficiency of method to acquire and to input or to amend spatial information using a GPS Lap-top Computer System.

• Journal of Biosystems Engineering
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• v.17 no.1
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• pp.65-78
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• 1992

When using a computer vision system for a measurement, the geometrically distorted input image usually restricts the site and size of the measuring window. A geometrically distorted image caused by the image sensing and processing hardware degrades the accuracy of the visual measurement and prohibits the arbitrary selection of the measuring scope. Therefore, an image calibration is inevitable to improve the measuring accuracy. A calibration process is usually done via four steps such as measurement, modeling, parameter estimation, and compensation. In this paper, the efficient error calibration technique of a geometrically distorted input image was developed using a neural network. After calibrating a unit pixel, the distorted image was compensated by training CMLAN(Cerebellar Model Linear Associator Network) without modeling the behavior of any system element. The input/output training pairs for the network was obtained by processing the image of the devised sampled pattern. The generalization property of the network successfully compensates the distortion errors of the untrained arbitrary pixel points on the image space. The error convergence of the trained network with respect to the network control parameters were also presented. The compensated image through the network was then post processed using a simple DDA(Digital Differential Analyzer) to avoid the pixel disconnectivity. The compensation effect was verified using known sized geometric primitives. A way to extract directly a real scaled geometric quantity of the object from the 8-directional chain coding was also devised and coded. Since the developed calibration algorithm does not require any knowledge of modeling system elements and estimating parameters, it can be applied simply to any image processing system. Furthermore, it efficiently enhances the measurement accuracy and allows the arbitrary sizing and locating of the measuring window. The applied and developed algorithms were coded as a menu driven way using MS-C language Ver. 6.0, PC VISION PLUS library functions, and VGA graphic functions.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.26 no.12
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• pp.579-587
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• 2014

This paper deals with precise analytical state equation modeling of a variable speed refrigeration system (VSRS) for optimum control in state space. The VSRS is described as multi-input and multi-output (MIMO) system, which has two controlled variables and two control inputs. First, the Navier-Stokes equation and mass flow rate were applied to each component of the basic refrigeration cycle to build a dynamic model. The dynamic model, represented by a differential equation, was transformed into the state equation formula. Next, a full-order state observer was built to estimate all of the state variables to compose an optimum control system. Then, an optimum controller was designed to minimize an evaluation function that has input energy and control error. Finally, simulations and experiments were conducted to verify the validity of the proposed modeling and designed optimum controller to regulate target temperature and superheat in a 1RT oil cooler system. The results show that the proposed method, state equation modeling and optimum control, is efficient to ensure optimal control performance of the VSRS.

• Journal of IKEEE
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• v.21 no.3
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• pp.248-251
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• 2017

In this paper, The proposed board is developed by EMI compliant Dash Camera with $360^{\circ}$ omni angle. The proposed board is designed by designing DM and CM input noise reduction circuit and applying active EMI filter coupling circuit. The DM and CM input noise reduction circuit design uses a differential op amp circuit to obtain the DM noise coupled to the input signal via the parasitic capacitance(CP). In order to simplify the circuit by applying the active EMI filter coupling circuit, a noise separator is installed to compensate the noise of the EMI source to compensate the CM and DM active filter simultaneously. In order to evaluate the performance of the board for the proposed EMI response, an authorized accreditation body has confirmed that the electromagnetic certification standard for each frequency band is satisfied.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.6
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• pp.141-147
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• 2008

This paper describes the design of frequency down converting Mixer in the receiver to use compound semiconductor and CMOS product process. The basic theory and structure of frequency down converting Mixer is surveyed, and we design mixer circuit with active balun which use the compound semiconductor and CMOS process. This mixer convert a single ended signal to differential signal at input port of RF and LO instead of matching circuit to get dual band balanced mixer structure and characteristic broadband. This designed mixer has a conversion gain $-1{\sim}-6[dB]$ at $2{\sim}6[GHz]$ bandwidths. However, the simulation of the designed mixer with active balun has the result of a 7[dB] conversion gain for -2[dBm] LO input power and -10[dBm] input P1[dB] at 5.8[GHz].

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.5
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• pp.777-784
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• 2023

A sense amplifier is an essential peripheral circuit for designing a memory and is used to sense a small differential input signal and amplify it into digital signal. In this paper, a high-speed sense amplifier applicable to in-memory computing circuits is proposed. The proposed circuit reduces sense delay time through transistor Mtail that provides an additional discharge path and improves the circuit performance of the sense amplifier by applying m-GDI (: modified Gate Diffusion Input). Compared with previous structure, the sense delay time was reduced by 16.82%, the PDP(: Power Delay Product) by 17.23%, the EDP(: Energy Delay Product) by 31.1%. The proposed circuit was implemented using TSMC's 65nm CMOS process, while its feasibility was verified through SPECTRE simulation in this study.