• ETRI Journal
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• 제29권6호
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• pp.835-837
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• 2007

A multi-bit sigma-delta modulator architecture is described for low-distortion performance and a high-speed operation. The proposed architecture uses both a delayed code and a delayed differential code of analog-to-digital converter in the feedback path, thereby suppressing signal components in the integrators and relaxing the timing requirement of the analog-to-digital converter and the scrambler logic. Implemented by a 0.13 ${\mu}m$ CMOS process, the sigma-delta modulator achieves high linearity. The measured spurious-free dynamic range is 89.1 dB for -6 dBFS input signal.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권5호
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• pp.687-694
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• 2016

A differential power amplifier operating at millimeter-wave frequencies is demonstrated using a 65-nm CMOS technology. All of the input, output, and inter-stage network are implemented by transformers only, enabling impedance matching with low loss and a wide bandwidth. The millimeter-wave power amplifier exhibits measured small-signal gain exceeding 12.6 dB over a 3-dB bandwidth from 45 to 56 GHz. The output power and PAE are 13 dBm and 11.7%, respectively at 50 GHz.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 학술대회 논문집 전문대학교육위원
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• pp.92-95
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• 2004

Power transformer is an important apparatus in transforming and delivering the power in a power system. It shows less accident ratio than other system apparatus, but once the accident occurs, it causes long-term operation stoppage and economic loss. It brings high bad spillover effects. Therefore, the role of protective relaying, which is to prevent internal fault a power transformer is highly important. This study proposed advanced algorithm that can clearly determine internal fault of the power transformer and magnetizing inrush, through numerical analysis by using the terminal voltage and input output current.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.1009-1010
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• 2008

This paper presents a real-time aging measurement and feasible compensation system for the prolonged lifetime of OLED panel. The proposed system is composed of four parts, a PC with a man-machine interface, a measurement block, an adaptive amplifier block, and a compensation block. We apply a tree algorithm for less complexity and convenience of measurement on the degree of aging. An adaptive multi-stage differential amplifier is also implemented to deal with a various range of input voltages at the same spot.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2001년도 ICCAS
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• pp.161.4-161
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• 2001

This paper presents adaptive control of robot manipulator using neuro-fuzzy controller Fuzzy logic is control incorrect system without correct mathematical modeling. And, neural network has learning ability, error interpolation ability of information distributed data processing, robustness for distortion and adaptive ability. To reduce the number of fuzzy rules of the FLS(fuzzy logic system), we consider the properties of robot dynamic. In fuzzy logic, speciality and optimization of rule-base creation using learning ability of neural network. This paper presents control of robot manipulator using neuro-fuzzy controller. In proposed controller, fuzzy input is trajectory following error and trajectory following error differential ...

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1986년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 17-18 Oct. 1986
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• pp.83-85
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• 1986

The error differential equations which are derived by using the first error model are uniformly asymptotial stable if the input is bounded and sufficiently rich. In the adaptive control, the speed of convergence of system output or parameter error in such cases is of both practical and theoretical interest. In this paper, the adaptive algorithms(Gradient algorithm, Intergral algorithm) are discussed from the point of view of speed convergence and the modification of adaptive law for prohibition of overadaptation is discussed. The result is compared among this algorithms and the adaptive gain is choosed by this result(the speed of convergence).

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.244-247
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• 1999

In this paper, a low voltage CMOS analog four-quadrant multiplier is presented. The proposed multiplier is composed of a pair of transconductor and lowers supply voltage down to $V_{T}$+2 $V_{Ds,sat}$+ $V_{DS,triode}$. The designed analog four-quadrant multiplier have simulated by HSPICE using 0.25${\mu}{\textrm}{m}$ n-well CMOS process with a 1.2V supply voltage. Simulation results show that the THD can be 1.28% at maximum differential input of 0.7 $V_{p-p}$././.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.1163-1166
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• 1999

In this paper, A CMOS power amplifier for PCS is designed with 0.65-$\mu\textrm{m}$ CMOS technology. Differential cascode structure is used which has good reverse isolation and wide voltage swing. This amplifier circuits consist of three stages which are power amplification stage, driver stage and power control stage. We obtain output power of 30 ㏈m, IMD3 of -31㏈c and efficiency of 30 % at input power of 4 ㏈m.

• 전자공학회논문지A
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• 제28A권1호
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• pp.46-51
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• 1991

The new signal process circuit using ISFETs as two input devices of a MOS differential amplifier stage for application to a ISFET biosensor was developed and its operational characteristics simulated. For a single chip integration of ISFETs, developed signal process circuit and metal reference electrode, serial studies including process development and chip layout was carried out.

• 전자공학회논문지SC
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• 제38권5호
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• pp.52-58
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• 2001

본 논문에서는 직렬 복합 트랜지스터를 이용한 저전압 선형 가변 트랜스컨덕터를 설계하였다. 직렬 복합트랜지스터는 포화 영역에서 동작하는 트랜지스터와 선형 영역에서 동작하는 트랜지스터가 직렬 연결된 구조로 낮은 공급 전압에서도 넓은 입력 전압 범위를 갖는다. 설계된 트랜스컨덕터는 $0.25{\mu}m$ CMOS n-well 공정 파라미터를 이용하여 HSPICE로 시뮬레이션한 결과 차단주파수는 309MHz 이고, 입력 신호 주파수가 10MHz일 때 1.5VP-P의 차동 입력에 대해 1.1%이하의 THD 특성을 갖는다.