• Title/Summary/Keyword: Differential Circuit

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A Differential Colpitts-VCO Circuit Suitable for Sub-1V Low Phase Noise Operation (1V 미만 전원 전압에서 저 위상잡음에 적합한 차동 콜피츠 전압제어 발진기 회로)

  • Jeon, Man-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.6 no.1
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    • pp.7-12
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    • 2011
  • This paper proposes a differential Colpitts-VCO circuit suitable for low phase noise oscillation at the sub-1V supply voltage. Oscillation with low phase noise at the sub-1V supply voltage is facilitated by employing inductors as the current sources of the proposed circuit. One of the two feedback capacitors of the single-ended Colpitts oscillator in the proposed circuit is replaced with the MOS varactor in order to further reduce the resonator loss. Post-layout simulation results using a $0.18{\mu}m$ RF CMOS technology show that the phase noises at the 1MHz offset frequency of the proposed circuit oscillating at the sub-1V supply voltages of 0.6 to 0.9 V are at least 7 dBc/Hz lower than those of the well-known cross-coupled differential VCO.

The Design of LVDS Driver with ESD protection device of low voltage triggering characteristics (저 전압 트리거형 ESD 보호소자를 탑재한 LVDS Driver 설계)

  • Yuk, Seung-Bum;Kim, Kui-Dong;Kwon, Jong-Ki;Koo, Yong-Seo
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.805-808
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    • 2005
  • In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD(Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at same time. maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps, Also, the LIGCSCR(Latch-up Immune Gate Coupled SCR)was designed. It consists of PLVTSCR (P-type Low Voltage Trigger SCR), control NMOS and RC network. The triggering voltage was simulated to 3.6V. And the latch-up characteristics were improved. Finally, we performed the layout high speed I/O interlace circuit with the low triggered ESD protection device in one-chip.

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Proposal of the Current Mirror for the Circuit Design of CMOS Operational Amplifier (CMOS연산 증폭기 설계를 위한 전류 미러 제안)

  • ;;;;司空石鎭
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.1
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    • pp.13-20
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    • 2001
  • In this appear, we proposed the new current mirror has large output resistance and excellent current matching characteristics. If supply voltage were lowered under the conventional CMOS operational amplifier, the wing of out put power could be restricted. So, the paper suggests a new way of differential operational amplifier circuit to solve the problem. The paper proposes that a new current mirror increases output swing and has a stable operation. We compare and verify characteristics of the proposed current mirror with the cascoded current mirror and the regulated current mirror through simulation.

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A Study on the Drift-minimization in the Transistor Differential Amplifier (트란지스터 착동증폭기의 표동 극소화에 관한 연구)

  • 김종상
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.4 no.3
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    • pp.28-33
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    • 1967
  • The analysis of differential amplifier is simplified by the extention of bisection theorem. In order to reduce the thermal and porwor drifts, a self compensating circuit is employed. The optimum conditions of the self compensating circuit are: the base-emitter voltage of one transistor should be equal to the other's base-emitter voltage for basic self compensating circuit, the tempereature coefficients of base-emitter voltage of one transistor equal to the others for thermal compensation. By regarding the thermal and power drifts the experiments were performed were performed and the numerical results were consistent with the measured values.

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An 8b Two-stage Folding A/D Converter with Low DNL (낮은 DNL 특성을 가진 8b 2단 Folding A/D 변환기)

  • Cui, Zhi-Yuan;Cuong, Do-Danh;Yeom, Chang-Yoon;Lee, Hyung-Gyoo;Kim, Kyoung-Won;Kim, Nam-Soo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.5
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    • pp.421-425
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    • 2008
  • In this research, a 8-bit CMOS 2 stage folding A/D converter is designed, For low power consumption and small chip size, the A/D converter is designed by using folding and interpolation circuit. Folding circuit is composed of the transistor differential pairs which are connected in parallel. It reduces the number of comparator drastically. The analog block composed of folding block, current interpolation circuit, and three stage current comparator is designed with differential-mode for high speed operation. The simulation in a $0.35\;{\mu}m$ CMOS process. shows DNL and SNDR of 0.5LSB and 47 dB at 250 MHz/s sampling frequency.

A CMOS Op-amp Design of Improved Common Mode Feedback(CMFB) Circuit for High-frequency Filter Implementation (고주파용 필터구현을 위한 개선된 CMFB회로를 이용한 CMOS Op-amp 설계)

  • Lim, Dae-Sung;Choi, Young-Jae;Lee, Meung-Su;Kim, Dong-Yong
    • Proceedings of the KIEE Conference
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    • 1993.07a
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    • pp.479-482
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    • 1993
  • A fully balanced differential amplifier can achieve high-gain wide-bandwidth characteristics. And also, Offset PSRR, CMRR and Noise performance of that are excellent, but these merits can be achieved only when the architecture holds fully balanced. Commonly, the fully balanced differential amplifier has a common mode feedback(CMFB) circuit in order to maintain the balance. This paper presents improved characteristics of the CMFB circuit and designs the wide-bandwidth CMOS Op-amp. The unity gain bandwidth of this Op-amp is 50MHz with the load capacitor 2pF, and the value of phase margin is $85^{\circ}$.

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MODEL ON THE DYNAMIC BEHAVIOR OF CONDUCTIVE FERROMAGNETIC MATERIAL WITH NEGLIGIBLE COERCIVITY

  • Kim, Dac-Soo
    • Journal of the Korean Magnetics Society
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    • v.5 no.5
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    • pp.790-794
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    • 1995
  • Differential equations governing dynamic behavior of toroid-shaped ferro-magnetic material having a small gap of uniform width were derived incorporating Maxwell equations of electromagnetic induction relevent to the system and Newtonian equation of motion. Once the external uniform magnetic field was applied within the material through dc-circuit around the toroid, gap begin to change which lead to the abrupt variation of field in the material and gap according to the differential equations already derived. Characteristics of current and electromotive force with respect to time in the circuit consisting of inductance and resistance in series could be predicted from numerical solutions of these equations. As current in the circuit increasesl, magnetic field in the material increases, thus, the gap starts to shrink due to increased attractive force between gap and elastic restoring force in the material. With an appropriate selection of elastic constant of toroidal ferromagnetic material and design of gap structure it is possible to obtain the specified in both linear and nonlinear magnetic characteristics, such as current dependent and independent inductance.

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A Process Detection Circuit using Self-biased Super MOS composit Circuit (자기-바이어스 슈퍼 MOS 복합회로를 이용한 공정 검출회로)

  • Suh Benjamin;Cho Hyun-Mook
    • Journal of the Institute of Convergence Signal Processing
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    • v.7 no.2
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    • pp.81-86
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    • 2006
  • In this paper, a new process detection circuit is proposed. The proposed process detection circuit compares a long channel MOS transistor (L > 0.4um) to a short channel MOS transistor which uses lowest feature size of the process. The circuit generates the differential current proportional to the deviation of carrier mobilities according to the process variation. This method keep the two transistor's drain voltage same by implementing the feedback using a high gain OPAMP. This paper also shows the new design of the simple high gam self-biased rail-to-rail OPAMP using a proposed self-biased super MOS composite circuit. The gain of designed OPAMP is measured over 100dB with $0.2{\sim}1.6V$ wide range CMR in single stage. Finally, the proposed process detection circuit is applied to a differential VCO and the VCO showed that the proposed process detection circuit compensates the process corners successfully and ensures the wide rage operation.

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Buck-Flyback (fly-buck) Stand-Alone Photovoltaic System for Charge Balancing with Differential Power Processor Circuit

  • Lee, Chun-Gu;Park, Jung-Hyun;Park, Joung-Hu
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.1011-1019
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    • 2019
  • In this paper, a buck-flyback (fly-buck) stand-alone photovoltaic (PV) system for charge balancing with a differential power processor (DPP) circuit is proposed. Conventional feed-back DPP converters draw differential feed-back power from the output of a string converter. Therefore, the power is always through the switches and diodes of the string converter. Because of the returning conduction path, there are always power losses due to the resistance of the switch and the forward voltage of the diode. Meanwhile, the proposed feed-back DPP converter draws power from the magnetically-coupled inductor in a string converter. This shortens the power path of the DPP converter, which reduces the power losses. In addition, the extra winding in the magnetically-coupled inductor works as a charge balancer for battery-stacked stand-alone PV systems. The proposed system, which uses a single magnetically-coupled inductor, can control each of the PV modules independently to track the maximum power point. Thus, it can overcome the power loss due to the power path. It can also achieve charge balancing for each of the battery modules. The proposed topology is analyzed and verified using 120W hardware experiments.

Differential detection systems with nonredundant error correction and feedback combining (비용장 오류 정정과 궤환결합을 갖는 차동 검파 시스팀)

  • Han, Young-yeal
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.5
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    • pp.31-41
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    • 1995
  • In this paper, the relationship between k consecutive outputs of the conventional differential detector and output of differential detector with k-symbol periods delay for differential MSK and GMSK systems is investigated. It is hown that there exists periodity in modulo-2 sum and product of k successive outputs of the conventional differential detector with the output of a detector with k-symbol periods delay circuit. This relationships are used to achieve performance gains over conventional differential detection. The error rate performance of the method is carried out by computer simulation and performance improvement is achieved for differential MSK and GMSK systems.

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