• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.79-82
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• 1998

Film characteristics of thin ONO dielectric layers for MONOS(metal-oxide-nitride-oxide-semiconductor) EEPRM was investigated by AES and AFM. Second derivative spectra of AES Si LVV overlapping peak provided useful information for chemical state analysis of superthin film. The ONO films with dimension of tunneling oxide 24${\AA}$, nitride 33${\AA}$, and blocking oxide 40${\AA}$ were fabricated. During deposition of the LPCVD nitride films on tunneling oxide, this thin oxide was nitrized. When the blocking oxide were deposited on the nitride film, the oxygen not only oxidized the nitride surface, but diffused through the nitride. The results of ONO film analysis exhibits that it is made up of SiO$_2$(blocking oxide)/O-rich SiON(interface/N-rich SiON(nitride)/-rich SiON(interface)/N-rich SiON(nitride)/O-rich SiON(tunneling oxide).

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1646-1648
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• 2000

This paper investigated structural and electrical properties of $Y_{2}O_3$ as a buffer layer of sin91r transistor FRAM (ferroelectric RAM). $Y_{2}O_3$ buffer layers were deposited at a low substrate temperature below 400$^{\circ}C$ and then RTA (rapid thermal anneal) treated. Investigated parameters are substrate temperature, $O_2$ partial pressure, post- annealing temperature, and suppression of interfacial $SiO_2$ layer generation. for a well-fabricated sample, we achieved that leakage current density ($J_{leak}$) in the order of $10^{-7}A/cm2$, breakdown electric field ($E_{br}$) about 2 MV/cm for $Y_{2}O_3$ film. Capacitance versus voltage analysis illustrated dielectric constants of 7.47. We successfully achieved an interface state density of $Y_{2}O_3$/Si as low as $8.72{\times}10^{10}cm^{-2}eV^{-1}$. The low interface states were obtained from very low lattice mismatch less than 1.75%.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.123-124
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• 2006

The sandwiched PZT/$BaTiO_3$/PZT thick films were fabricated by two different methods thick films of the PZT by screen printing method on alumina substrateselectrodes with Pt, thin films of $BaTiO_3$ by the spin-coating method on the PZT thick films and once more thick films of the PZT by the screen printing method on the $BaTiO_3$ layer. The structural and the dielectric properties were investigated for effect of various stacking sequence of sol-gel prepared $BaTiO_3$ coating solution at interface of the PZT thick films, The insertion of BaTi03 interlayer yielded the PZT thick films with homogeneous and dense grain structure with the number of $BaTiO_3$ layers. The leakage current density of the $PZT/BaTiO_3-1$ film is less that $4.41{\times}10^{-9}A/cm^2$ at 5 V.

• Progress in Superconductivity and Cryogenics
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• v.16 no.1
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• pp.14-18
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• 2014

The mechanical, electrical and thermal characteristics of insulating materials may significantly affect the performance and reliability of electrical devices using superconductors. General method to provide insulating layer between coated conductors is wrapping coated conductor with Kapton tape. But uniform and compact wrapping without failure or delamination in whole coverage for long length conductor is not a simple task and need careful control. Coating of insulating layer directly on coated conductor is desirable for providing compact insulating layer rather than wrapping insulating layers around conductor. Ceramic added polymer has been widely used as an insulating material for electric machine because of its good electrical insulating properties as well as excellent heat resistance and fairy good mechanical properties. The insulating layer of coated conductor should have high breakdown voltage and possesses suitable mechanical strength and maintain adhesiveness at the cryogenic temperature where it is used and withstand stress from thermal cycling. The insulating and mechanical properties of polymer can be improved by adding functional filler. In this study, insulating layer has been made by adding ceramic particles such as $SiO_2$ to a polymer resin. The size, amount and morphology of added ceramic powder was controlled and their effect on dielectric property of the final composite was measured and discussed for optimum composite fabrication.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.15.2-15.2
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• 2009

Manufacturing of printed electronics using printing technology has begun to get into the hot issue in many ways due to the low cost effectiveness to existing semi-conductor process. This technology with both low cost and high productivity, can be applied in the production of organic thin film transistor (OTFT), solar cell, radio frequency identification (RFID) tag, printed battery, E-paper, touch screen panel, black matrix for liquid crystal display (LCD), flexible display, and so forth. The emerging technology to manufacture the products in mass production is roll-to-roll printing technology which is a manufacturing method by printings of multi-layered patterns composed of semi-conductive, dielectric and conductive layers. In contrary to the conventional printing machines in which printing precision is about $50~100{\mu}m$, the printing machines for printed electronics should have a precision under $30{\mu}m$. In general, in order to implement printed electronics, narrow width and gap printing, register of multi-layer printing by several printing units, and printing accuracy of under $30{\mu}m$ are all required. We developed the roll-to-roll printing equipment used for printed electronics, which is composed of un-winder, re-winder, tension measurement system, feeding units, dancer systems, guide unit, printing unit, vision system, dryer units, and various auxiliary devices. The equipment is designed based on cantilever type in which all rollers except printing ones have cantilever types, which could give more accurate machine precision as well as convenience for changing rollers and observing the process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.47-50
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• 2000

This paper investigated structural and electrical properties of $Y_2$ $O_3$ as a buffer layer of single transistor FRAM (ferroelectric RAM). $Y_2$ $O_3$ buffer layers were deposited at a low substrate temperature below 40$0^{\circ}C$ and then RTA (rapid thermal anneal) treated. Investigated parameters are substrate temperature, $O_2$ partial pressure, post-annealing temperature, and suppression of interfacial $SiO_2$ layer generation. For a well-fabricated sample, we achieved that leakage current density ( $J_{leak}$) in the order of 10$^{-7}$ A/$\textrm{cm}^2$, breakdown electric field ( $E_{br}$ ) about 2 MV/cm for $Y_2$ $O_3$ film. Capacitance versus voltage analysis illustrated dielectric constants of 7.47. We successfully achieved an interface state density of $Y_2$ $O_3$/Si as low as 8.72x1010 c $m^{-2}$ e $V^{-1}$ . The low interface states were obtained from very low lattice mismatch less than 1.75%.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.8
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• pp.1159-1163
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• 2012

In this paper, a new method is suggested to reduce the size of a wide-band array antenna. The power-divider for the feeding structure is made compact as ${\lambda}/8$ with the help of a novel Metamaterial UWB bandpass filter. This power divider is clearly different from others in that the proposed design uses microstrip structured Composite Right and Left-Handed (CRLH) filters, while others use two dielectric layers or long tapered transmission lines. In order to validate the proposed design method, the circuit and full-wave simulated results of the power divider with the Metamaterial UWB filters are compared to each other, and the Metamaterial properties of the structure are shown with the electric field at the ZOR and dispersion diagram. Furthermore, the antenna performance of the fabricated antenna with the power divider is measured and compared with the prediction. Also, the size reduction effect by the proposed scheme is addressed.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1347-1348
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• 2007

In this paper, ITO gate electrode surface was modified using $O_2$ plasma and organic gate insulating layers were deposited on the ITO surface using plasma polymerization technique. In order to investigate the influence of the plasma coupling method and plasma conditions on the plasma polymerized methyl methacrylate (ppMMA) thin film properties, inductively coupled (ICP) and capacitively coupled plasma (CCP) were used to generate the plasma and the plasma parameters were varied. The ppMMAs were investigated using atomic force microscopy (AFM) and a Fourier Transform Infrared (FT-IR) spectroscopy. Dielectric constants of the ppMMA thin films were investigated using a impedance analyzer (HP4192A, LF Impedance Analyzer). Current-Voltage (I-V) characteristics of the organic thin film transistors (OTFTs) were investigated using a source measurement unit (SMU: Keithley 2612). Proposed method can be applied to dry-process to fabricate OTFTs during overall fabricating steps.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.207.2-207.2
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• 2013

Oxide-based thin film transistors have been attempted as powerful candidates for driving circuits for active-matrix organic light-emitting diodes and transparent electronics. The oxide TFTs are based on the amorphous multi-component oxides involving zinc, indium, and/or tin elements as main cation sources. The current work employed RF sputtering in order to deposit zinc-tin oxide thin films applicable to transparent oxide thin film transistors. The deposited thin film was characterized and probed in terms of materials and devices. The physical/chemical characterizations were performed using X-ray diffraction, Atomic Force Microscopy, Spectroscopic Ellipsometry, and X-ray Photoelectron Spectroscopy. The thin film transistors were fabricated using a bottom-gated structure where thermally-grown silicon oxide layers were applied as gate-dielectric materials. The inherent properties of oxide thin films are combined with the corresponding device performances with the aim to fabricating the multi-component oxide thin films being optimized towards transparent electronics.

• Laser Solutions
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• v.14 no.4
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• pp.14-20
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• 2011

The advantage of using lasers for through silicon via (TSV) drilling is that they allow higher flexibility during manufacturing because vacuums, lithography, and masks are not required; furthermore, the lasers can be applied to metal and dielectric layers other than silicon. However, conventional nanosecond lasers have disadvantages including that they can cause heat affection around the target area. In contrast, the use of a picosecond laser enables the precise generation of TSVs with a smaller heat affected zone. In this study, a comparison of the thermal and crystallographic defect around laser-drilled holes when using a picosecond laser beam with varing a fluence and repetition rate was conducted. Notably, the higher fluence and repetition rate picosecond laser process increased the experimentally recast layer, surface debris, and dislocation around the hole better than the high fluence and repetition rate. These findings suggest that even the picosecond laser has a heat accumulation effect under high fluence and short pulse interval conditions. To eliminate these defects under the high speed process, the CDE (chemical downstream etching) process was employed and it can prove the possibility to applicate to the TSV industry.