• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.4
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• pp.319-324
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• 2002

In this study, the reduce of plasma etching damage in PZT thin film with addictive gas and re-annealing after etching have been investigated. The PZT thin films were etched as a function of $Cl_2/CF_4$ with addition of Ar and $O_2$ with inductively coupled plasma. The etch rates of PZT thin films were 1450 ${\AA}/min$ at 30% additive Ar and 1100 ${\AA}/min$ at 10% auditive $O_2$ into $Cl_2/CF_4$ gas mixing ratio of 8/2. In order to reduce plasma damage of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures at $O_2$ atmosphere. From the hysteresis curries, the ferroelectric properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed PZT films is consistent wish the increase of the (100) and (200) PZT peaks revealed by x-ray diffraction (XRD). From x ray photoelectron spectroscopy (XPS) analysis, the intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of $Ti_xO_y$ is recovered by $O_2$ recombination during rapid thermal annealing process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.21-25
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• 2001

In this study, recovery of plasma etching damage in PZT thin film with additive gas and re-annealing after etching have been investigated. The PZT thin films were etched as a function of Cl$_2$/CF$_4$ with addition of Ar and $O_2$ with inductively induced plasma. The etch rates of PZT thin films were 1450$\AA$/min at 30% additive Ar into (Cl$_2$(80%)+CF$_4$ (20%)) and 1100$\AA$/min at 10% additive $O_2$ into C(Cl$_2$(80%)+CF$_4$ (20%)). In order to recovery properties of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures in at $O_2$ atmosphere. From the hysteresis curves, ferroelectrical properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed sample is consistent with the increase of the (100) and (200) PZT peaks revealed by x-ray diffraction (XRD). From x-ray photoelectron spectroscopy (XPS) analysis, intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of Ti$_{x}$O$_{y}$ is recovered by $O_2$ recombination during rapid thermal annealing process.s.s.

• Journal of the Korean Vacuum Society
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• v.20 no.3
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• pp.182-188
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• 2011

Polysilazane and polymethylsilazane based precursor films were deposited on Si-substrate by spin-coating, subsequently annealed at $150{\sim}850^{\circ}C$, and characterized. Structural analysis, shrink, compositional change, etch rate, and gap-filling were observed. Annealing the precursor films led to formation of spin-on dielectric films. C-containing precursor films showed that less loss of N, H, and C while less gain of O than that of C-free precursor films at $400^{\circ}C$, but more loss of N, H, and C while more gain of O at $850^{\circ}C$. Thus polysilazane based precursor films exhibited less reduction in thickness of 14.5% than silazane based one of 15.6% at $400^{\circ}C$ but more 37.4% than 19.4% at $850^{\circ}C$. FTIR indicated that C induced smaller amount of Si-O bond, non-uniform property, and lower resistance to chemical etching.

• Korean Journal of Materials Research
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• v.24 no.5
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• pp.259-265
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• 2014

$ZrO_2$ films were coated on aluminum etching foil by the sol-gel method to apply $ZrO_2$ as a dielectric material in an aluminum(Al) electrolytic capacitor. $ZrO_2$ films annealed above $450^{\circ}C$ appeared to have a tetragonal structure. The withdrawal speed during dip-coating, and the annealing temperature, influenced crack-growth in the films. The $ZrO_2$ films annealed at $500^{\circ}C$ exhibited a dielectric constant of 33 at 1 kHz. Also, uniform $ZrO_2$ tunnels formed in Al etch-pits $1{\mu}m$ in diameter. However, $ZrO_2$ film of 100-200 nm thickness showed the withstanding voltage of 15 V, which was unsuitable for a high-voltage capacitor. In order to improve the withstanding voltage, $ZrO_2$-coated Al etching foils were anodized at 300 V. After being anodized, the $Al_2O_3$ film grew in the directions of both the Al-metal matrix and the $ZrO_2$ film, and the $ZrO_2$-coated Al foil showed a withstanding voltage of 300 V. However, the capacitance of the $ZrO_2$-coated Al foil exhibited only a small increase because the thickness of the $Al_2O_3$ film was 4-5 times thicker than that of $ZrO_2$ film.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.319-319
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• 2013

Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2000.11a
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• pp.21-24
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• 2000

Ferroelectric YMnO$_3$thin films are excellent dielectric materials for high integrated ferroelectric random access memory (FRAM) with metal-ferroelectric-silicon field effect transistor (MFSFET) structure. In this study, YMnO$_3$thin films were etched with Cl$_2$/Ar gas chemistries in inductively coupled plasma (ICP). The maximum etch rate of YMnO$_3$thin films is 285 $\AA$/min under Cl$_2$/Ar of 10/0, 600 W/-200 V and 15 mTorr. The selectivities of YMnO$_3$over CeO$_2$and $Y_2$O$_3$are 2.85, 1.72, respectively. The results of x-ray photoelectron spectroscopy (XPS) reflect that Y is removed dominantly by chemical reaction between Y and Cl, while Mn is removed more effective by Ar ion bombardment than chemical reaction. The results of secondary ion mass spectrometer (SIMS) were equal to these of XPS. The etch profile of the etched YMnO$_3$film is approximately 65$^{\circ}$and free of residues at the sidewall.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.5 no.2
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• pp.87-93
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• 1995

Strontium titanate single crystal was grown by floating wne method. Growth conditions are as follows; at air atmosphere, rotation rate of upper and lower shafts were 20 - 25 rpm, 15 - 20 rpm respectively and growth rate was 3 mmlhr. As grown crystal was light brown color and transparent. After annealing, color was faded away. Growth direction was [112] direction and it was confirmed that grown crystal has $SrTiO_3$single phase and stoichiometric composition by XRD and EDS. Etch pit pattern was investigated after chemical etching in $350^{\circ}C$, KOH solution for 5 min and dielectric constant was measured at the range of room temperature ~ $350^{\circ}C$ .

• Journal of IKEEE
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• v.19 no.1
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• pp.41-44
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• 2015

Silicon trench process for bulk fin field effect transistor (finFET) is suggested without using chemical mechanical polishing (CMP) that cause contamination problems with chemical stuff. This process uses thickness difference of photo resistor spin coating and silicon nitride sacrificial layer. Planarization of silicon oxide and silicon trench formation can be performed with etching processes. In this work 50 nm silicon trench is fabricated with AZ 1512 photo resistor and process results are introduced.

• International Journal of Precision Engineering and Manufacturing
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• v.4 no.4
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• pp.51-56
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• 2003

Generally, the build-up printed circuit board manufactured by a sequential process involving etching, plating, drilling, etc, which requires many types of equipments and long lead time. Etching process is suitable for mass production, however, it is not adequate for manufacturing a prototype in the development stage. In this study, we introduce a screen printing technology for prototyping a build-up printed circuit board. As for the material, photo/thermal curable resin and conductive paste are used for the formation of dielectric and conductor. The build-up structure is made by subsequent processes such as formation of a liquid resin thin layer, solidification by a UV/IR light, and via hole filling with a conductive paste. By use of photo curable resin, productivity is greatly enhanced compared with thermal curable resin. Finally, the basic concept and the possibility of build-up printed circuit board prototyping are proposed in comparison with the conventional process.

• Progress in Superconductivity
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• v.3 no.1
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• pp.49-55
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• 2001

Josephson junction arrays were fabricated by DC magnetron sputtering, self-aligning and reactive ion etching technique. The Al native oxide, formed by thermal oxidation, was used as the tunneling barrier of Nb/$Al-A1_2$$O_3$Nb trilayer. The arrays have 2,000 Josephson junctions with the area of $14\mu\textrm{m}$ $\times$ $46\mu\textrm{m}$. The gap voltages were in the range of 2.5 ~2.6 mV and the spread of critical current was $\pm$11~14%. When operated at 70~94 ㎓, the arrays generated zero-crossing steps up to 2.1~2.4 V. To improve transmission of microwave power and prevent diffusion of oxygen into Nb ground-plane while depositing $SiO_2$dielectric, we applied a plasma nitridation process to the Nb ground-plane. The microwave power was well propagated in Josephson junction arrays with nitridation. The difference in microwave transmission 7an be interpreted by the surface impedance change depending on nitridation.