• 제목/요약/키워드: Design of a Block

검색결과 2,667건 처리시간 0.029초

SFC에 의한 권역별 처리 방법에 관한 연구 (Study on the method of Block processing by SFC)

  • 유정봉
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년 학술대회 논문집 정보 및 제어부문
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    • pp.273-275
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    • 2006
  • Ladder Diagram(LD) is the most widely utilized among many sorts of existing programs using for the design of process control system. But it is very difficult to grasp sequential flow of control logic. In this paper, we proposed the method that we can control a lot of blocks. We used PLC in process control system. And, in order to design we used Sequential Function Chart(SFC). In this paper, we proposed the method of block contro. and confirmed feasibility through a simulation.

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NST알고리즘을 이용한 비동기식 16비트 제산기 설계 (Design of Asynchronous 16-Bit Divider Using NST Algorithm)

  • 이우석;박석재;최호용
    • 대한전자공학회논문지SD
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    • 제40권3호
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    • pp.33-42
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    • 2003
  • 본 논문에서는 NST (new Svoboda-Tung) 알고리즘을 이용한 비동기식 제산기의 효율적 설계에 관해 기술한다. 본 제산기설계에서는 비동기 설계방식을 사용하여 제산연산이 필요할 때에만 동작함으로써 전력소모를 줄이도록 설계한다. 제산기는 비동기식 파이프라인 구조를 이용한 per-scale부, iteration step부, on-the-fly converter부의 세부분으로 구성된다. Per-scale부에서는 새로운 전용 감산기를 이용하여 적은 면적과 고성능을 갖도록 설계한다. Iteration step부에서는 4개의 division step을 갖는 비동기식 링 구조로 설계하고, 아울러 크리티컬 패스(critical path)에 해당하는 부분만을 2선식으로, 나머지 부분은 단선식으로 구성하는 구현방법을 채택하여 하드웨어의 오버헤드를 줄인다. On-the-fly converter부는 iteration step부와 병렬연산이 가능한 on-the-fly 알고리즘을 이용하여 고속연산이 되도록 설계한다. 0.6㎛ CMOS 공정을 이용하여 설계한 결과, 1,480 ×1,200㎛²의 면적에 12,956개의 트랜지스터가 사용되었고, 41.7㎱의 평균지연시간을 가졌다.

Parameter Estimation of The Distributed System via Improved Block Pulse Coefficients Estimation

  • Kim, Tai-hoon;Shim, Jae-sun
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2002년도 ICCAS
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    • pp.61.6-61
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    • 2002
  • In these days, Block Pulse functions are used in a variety of fields such as the analysis and controller design of the systems. In applying the Block Pulse function technique to control and systems science, the integral operation of the Block Pulse series plays important roles. This is because differential equations are always involved in the representations of continuous-time models of dynamic systems, and differential operations are always approximated by the corresponding Block Pulse series through integration operational matrices. In order to apply the Block Pulse function technique to the problems of continuous-time dynamic systems more efficiently, it is necessary to find th...

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Design of the timing controller for automatic magnetizing system

  • Yi Jae Young;Arit Thammano;Yi Cheon Hee
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 학술대회지
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    • pp.468-472
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    • 2004
  • In this paper a VLSI design for the automatic magnetizing system has been presented. This is the design of a peripheral controller, which magnetizes CRTs and computers monitors and controls the automatic inspection system. We implemented a programmable peripheral interface(PPI) circuit of the control and protocol module for the magnetizer controller by using a O.8um CMOS SOG(Sea of Gate) technology of ETRI. Most of the PPI functions has been confirmed. In the conventional method, the propagation/ramp delay model was used to predict the delay of cells, but used to model on only a single cell. Later, a modified "apos;Linear delay predict model"apos; was suggested in the LODECAP(LOgic Design Capture) by adding some factors to the prior model. But this has not a full model on the delay chain. In this paper a new "apos;delay predict equationapos;" for the design of the timing control block in PPI system has been suggested. We have described the detail method on a design of delay chain block according to the extracted equation and applied this method to the timing control block design.

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블록체크 원피스의 실루엣 유형과 패턴의 크기 변화에 따른 시각적 평가 (A Study of Visual Evaluation according to Changes in the Silhouette and Pattern of Block Dresses)

  • 김정미
    • 한국의상디자인학회지
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    • 제18권1호
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    • pp.121-133
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    • 2016
  • The purpose of this study is to recognize the differences of visual evaluation by variations in pattern and silhouette of the block dresses. The stimuli are 9 samples: 3 variations of the silhouette and 3 variations of the size of pattern. The data has been obtained from 55 fashion students and has been analyzed by using Factor Analysis, Anova, Scheffe's Test and the MCA method. The results of this study are as follows; 1) The visual evaluation by pattern and silhouette of block dresses are composed of 4 factors: lovable personality, physical characteristics, boldness, and simplicity. 2) Block dresses were evaluated to display the figure more efficiently, such as looking slimmer or taller, in the order of 2nd stage, 1st stage, and 3rd stage in every silhouette. As the patterns became bigger, straight silhouette dresses were judged to have bolder, more dignified images. 3) Block dresses were evaluated to have cute and lively images in order of hourglass silhouette, straight silhouette, and fitted silhouette in every pattern. They were evaluated to appear slimmer and taller in order of hourglass silhouette, fitted silhouette, and straight silhouette in every pattern. 1st stage and 2nd stage dresses were evaluated to have a bolder, more dignified image in order of fitted silhouette, hourglass silhouette, and straight silhouette. 4) The pattern and the silhouette of the block dresses interacted with boldness. These were the boldest, most dignified image in the fitted silhouette and 1st stage, while they were not judged so in the case of the straight silhouette and 1st stage. 5) According to the MCA regarding lovable personality and physical characteristics, the silhouette affected the visual image of the block dresses more than the pattern did. According to the MCA on simplicity, the pattern affected the visual image of the block dresses more than the silhouette.

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과냉비등류에 있어서 동블록을 이용한 과도적 냉각실험 (Transient cooling experiments with a cooper block in a subcooled flow boiling system)

  • 정대인;김경근;김명환
    • Journal of Advanced Marine Engineering and Technology
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    • 제11권1호
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    • pp.72-79
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    • 1987
  • When the wall temperature is very high, a stable vapor film covers the heat transfer surface. The vapor film creates a strong thermal resistance when heat is transferred to the liquid though it. This phenomenon, called "film boiling" is very important in the heat treatment of metals, the design of cryogenic heat exchangers, and the emergency cooling of nuclear reactors. In the practical engineering problems of the transient cooling process of a high temperature wall, the wall temperature history, the variation of the heat transfer coefficients, and the wall superheat at the rewetting points, are the main areas of concern. These three areas are influenced in a complex fashion such factors as the initial wall temperature, the physical properties of both the wall and the coolant, the fluid temperature, and the flow state. Therefore many kinds of specialized experiments are necessary in the creation of precise thermal design. The object of this study is to investigate the heat transfer characteristics in the transient cooling process of a high temperature wall. The slow transient cooling experiment was carried out with a copper block of high thermal capacity. The block was 240 mm high and 79 mm O.D.. The coolant flowed throuogh the center of a 10 mm diameter channel in the copper block. In the copper block, three sheathed thermocouples were placed in a line perpendicular to the flow. These thermocouples were used to take measurements of the temperature histories of the copper block.

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영상처리용 Morphological Filter의 하드웨어 설계 (Design of Morphological Filter for Image Processing)

  • 문성용;김종교
    • 한국통신학회논문지
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    • 제17권10호
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    • pp.1109-1116
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    • 1992
  • Mathematical morphology는 이론적 배경으로 신호 및 시스템의 기하학적 특성을 해석하는데 우수하고 잡음이 섞인 데이터를 고르기에 있어서 매우 성공적으로 적용되고 있다. 본 논문에서는 morphological필터의 하드웨어 구현은 같은 회로에서 gray scale dilation과 erosion을 수행하여 최소값과 최대값을 선택하도록 함으로써 회로의 복잡성을 줄이고 병렬처리가 가능하도록 하였다. Morphological filter의 구조는 structuring element블록, 이미지 데이타 블록, 제어 블록, ADD 블록, MIN/MAX블록으로 구성되고 실시간 처리가 가능하도록 하드웨어를 설계, one chip화 한다.

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도시지역 단일동 아파트의 계획특성 분석연구 - 대전광역시 단일동 아파트를 중심으로 - (A Study on the Characteristics of Single Housing Block - Focused on Daejeon Metropolitan City -)

  • 강인호
    • 한국주거학회논문집
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    • 제24권3호
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    • pp.9-18
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    • 2013
  • This paper aims to investigate the design characteristics of a single housing block which is increasing in urban areas. For the analysis, all cases of single block housing in Daejeon metropolitan city were gathered into a database. Main concerns were on the location and the physical characteristics. The results of this study were as follows; 1) single block housing has been increasing both in the new developed areas and the existing urban areas 2) their location has shifted from residential districts to semi-residential and commercial districts. For this reason, the size and density has been increasing 3) the slab block with the hall type and the exterior corridor type were general in residential districts, diverse ones, however, including the point tower type were increasing with unusual circulation types such as central corridor, central core, double corridor, and mixed type in semi-residential and commercial districts 4) there were 5 types of access systems, and especially the street access and the piloti access were increasing, which were related with the high density.

조선 중일정 블록 배량 계획 자동화 연구 (An Automatic Block Allocation Methodology at Shipbuilding Midterm Scheduling)

  • 황인혁;남승훈;신종계
    • 한국CDE학회논문집
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    • 제17권6호
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    • pp.409-416
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    • 2012
  • Most of the shipbuilding scheduling researches so far have been conducted with stress on the dock plan. That is due to the fact that the dock is the least extendable resource in shipyards and its overloading is difficult to resolve. However, once the dock scheduling is completed, it is also important to make a plan that make the best use of the rest of the resources in the shipyard, so that any additional cost is minimized. This study automates block allocation process by analyzing the existing manual process that designates production bays for the blocks during the midterm planning. Also, a planning scenario validation method is suggested, where block allocation scenarios based on diagrams are edited and simulated.

10Mbps급 HomePNA2.0 PHY. 회로 설계 (A design of HomePNA2.0 PHY.)

  • 박성희;구기종;김종원
    • 한국통신학회논문지
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    • 제27권12C호
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    • pp.1282-1287
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    • 2002
  • 본 논문에서는 가정 내의 전화선을 이용한 홈 네트워크 기술인 10Mbps HomePNA(Home Phoneline Networking Alliance) 20 PHY 회로의 설계 및 그에 대한 검증방법을 보여 준다. HomePNA 2.0 PHY 회로는 MII(Media Independent Interface)와 AFE 인터페이스에 의해 외부와 연결된다. 설계된 10Mbps HomePNA 2.0 PHY의 회로의 전체 구조는 Management block IEEE 802.3 CSMA/CD MAC(Media Access Control) block, 변조 및 복조 block으로 크게 구성된다. 설계된 회로는 프로토타입 FPGA PCB 보드를 이용하여 검증하였다. 또한, Linux 기반의 드라이버 프로그램을 개발하여 HomePNA 프레임 데이터 전송의 기본적인 동작을 확인하였으며, HomePNA 2.0 링크 계층 프로토콜의 RNCF(Rate Negotiation Control Function)에 의하여 전송속도의 변화를 확인하였다.