• Title/Summary/Keyword: Design & Coding Standard

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Development of the Design & Coding Standard of Railway Signaling Software as a Automatic Testing Tool (열차제어시스템 소프트웨어 안전성 확인을 위한 코딩규칙 테스팅 자동화 도구의 개발)

  • Hwang, Jong-Gyu;Jo, Hyun-Jeong
    • Journal of the Korean Society for Railway
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    • v.12 no.1
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    • pp.81-87
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    • 2009
  • Recent advances in computer technology have brought more dependency on software to railway signalling system. While much efforts have been reported to evaluate embedded software safety for railway signalling systems, not so much systematic approaches to evaluate software safety testing. In this paper, we propose a adaption of automatic software testing tool in terms of the design & coding standard for railway signalling system. The test items for the design & coding standard suggested in this study related international standards and MISRA-C. It is anticipated that it will be greatly helpful for the evaluation on the software for railway signalling system.

Reusable HEVC Design in 3D-HEVC

  • Heo, Young Su;Bang, Gun;Park, Gwang Hoon
    • ETRI Journal
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    • v.38 no.5
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    • pp.818-828
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    • 2016
  • This paper proposes a reusable design for the merging process used in three-dimensional High Efficiency Video Coding (3D-HEVC), which can significantly reduce the implementation complexity by eliminating duplicated module redundancies. The majority of inter-prediction coding tools used in 3D-HEVC are utilized through a merge mode, whose extended merging process is based on built-in integration to completely wrap around the HEVC merging process. Consequently, the implementation complexity is unavoidably very high. To facilitate easy market implementation, the design of a legacy codec should be reused in an extended codec if possible. The proposed 3D-HEVC merging process is divided into the base merging process of reusing HEVC modules and reprocessing process of refining the existing processes that have been newly introduced or modified for 3D-HEVC. To create a reusable design, the causal and mutual dependencies between the newly added modules for 3D-HEVC and the reused HEVC modules are eliminated, and the ineffective methods are simplified. In an application of the proposed reusable design, the duplicated reimplementation of HEVC modules, which account for 50.7% of the 3D-HEVC merging process, can be eliminated while maintaining the same coding efficiency. The proposed method has been adopted as a normative coding tool in the 3D-HEVC international standard.

A VLSI Efficient Design and Implementation of Bit Plane Coding Algorithm for JPEG2000 (JPEG2000을 위한 Bit Plane Coding Algorithm의 효율적인 VLSI 설계 및 구현)

  • Yang, Sang-Hoon;Min, Byung-Jun;Park, Dong-Sun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.1
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    • pp.146-150
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    • 2009
  • Nowdays needs the new still image compression standard. JPEG2000 has been developed. JPEG2000 divide DWT and EBCOT. EBCOT is consisted of Bit Plane Coding and ARithmetic Coding algorithm. In this paper, we proposed BPC algorithm that is efficient context-based generation. Proposed BPC Algorithm forecasted coding pass using SigStage, column, mpass value. BPC designed using Verilog HDL. H/W implemenates using Xillinx FPGA technology.

Non-fixed Quantization Considering Entropy Encoding in HEVC (HEVC 엔트로피 부호화를 고려한 비균등 양자화 방법)

  • Gweon, Ryeong-Hee;Han, Woo-Jin;Lee, Yung-Lyul
    • Journal of Broadcast Engineering
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    • v.16 no.6
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    • pp.1036-1046
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    • 2011
  • MPEG and VCEG have constituted a collaboration team called JCT-VC(Joint Collaborative Team on Video Coding) and have been developing HEVC(High Efficiency Video Coding) standard. All transform coefficients in a TU(Transform Unit) have been equally quantized according to the quantization and inverse quantization method which is used in HEVC standard. Such an equal quantization is not efficient because the transformed coefficients in the TU are not eqully distributed. Furthermore, the quantized coefficients which is positioned in later scanning order cannot be efficient due to the entropy scanning method. We suggest an algorithm that transform coefficients are quantized at different values according to the position in TU considering a scanning order of entropy encoding to improve the coding efficiency. The principle of this algorithm is that quantization and inverse quantization are carried out according to the scanning order which is in accordance with the statistical characteristic of distribution of quantized transform coefficients. The proposed algorithm shows on the average of 0.34% Y BD-rate compression rate improvement.

A VLSI Design of Discrete Wavelet Transform and Scalar Quantization for JPEG2000 CODEC (JPEG2000 CODEC을 위한 DWT및 양자화기 VLSI 설계)

  • 이경민;김영민
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.1
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    • pp.45-51
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    • 2003
  • JPEG200, a new international standard for still image compression based on wavelet and bit-plane coding techniques, is developed. In this paper, we design the DWT(Discrete Wavelet Transform) and quantizer for JPEG2000 CODEC. DWT handles both lossy and lossless compression using the same transform-based framework: The Daubechies 9/7 and 5/3 transforms, and quantizer is implemented as SQ(Scalar Quantization). The architecture of the proposed DWT and SQ are synthesized and verified using Xilinx FPGA technology. It operates up to 30MHz, and executes algorithms of wavelet transform and quantization for VGA 10 frame per second.

Design on MPEC2 AAC Decoder

  • NOH, Jin Soo;Kang, Dongshik;RHEE, Kang Hyeon
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1567-1570
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    • 2002
  • This paper deals with FPGA(Field Programmable Gate Array) implementation of the AAC(Advanced Audio Coding) decoder. On modern computer culture, according to the high quality data is required in multimedia systems area such as CD, DAT(Digital Audio Tape) and modem. So, the technology of data compression far data transmission is necessity now. MPEG(Moving Picture Experts Group) would be a standard of those technology. MPEG-2 AAC is the availableness and ITU-R advanced coding scheme far high quality audio coding. This MPEG-2 AAC audio standard allows ITU-R 'indistinguishable' quality according to at data rates of 320 Kbit/sec for five full-bandwidth channel audio signals. The compression ratio is around a factor of 1.4 better compared to MPEG Layer-III, it gets the same quality at 70% of the titrate. In this paper, for a real time processing MPEG2 AAC decoding, it is implemented on FPGA chip. The architecture designed is composed of general DSP(Digital Signal Processor). And the Processor designed is coded using VHDL language. The verification is operated with the simulator of C language programmed and ECAD tool.

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A Design and Development of Secure-Coding Check System Based on E-Government Standard Framework for Convergence E-Government Service (융복합 전자정부 서비스를 위한 전자정부 표준프레임워크 기반 시큐어코딩 점검 시스템 설계 및 개발)

  • Kim, Hyungjoo;Kang, Jungho;Kim, Kyounghun;Lee, Jaeseung;Jun, Moonseog
    • Journal of Digital Convergence
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    • v.13 no.3
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    • pp.201-208
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    • 2015
  • Recently computer, smart phone, medical devices, etc has become used in a variety of environments as the application fields of IT products have become diversification. Attack case of abuse of software security vulnerabilities is on the increase as the application fields of software have become diversification. Accordingly, secure coding program is of a varied but history management, updating, API module to be vulnerable to attack. Thus, this paper proposed a materialization of CMS linked system to enable check the vulnerability of the source code to content unit for secure software development, configuration management system that interwork on the transmission module. Implemented an efficient coding system secure way that departmentalized by the function of the program and by analyzing and applying secure coding standards.

Conditional Probability Based Early Termination of Recursive Coding Unit Structures in HEVC (HEVC의 재귀적 CU 구조에 대한 조건부 확률 기반 고속 탐색 알고리즘)

  • Han, Woo-Jin
    • Journal of Broadcast Engineering
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    • v.17 no.2
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    • pp.354-362
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    • 2012
  • Recently, High Efficiency Video Coding (HEVC) is under development jointly by MPEG and ITU-T for the next international video coding standard. Compared to the previous standards, HEVC supports variety of splitting units, such as coding unit (CU), prediction unit (PU), and transform unit (TU). Among them, it has been known that the recursive quadtree structure of CU can improve the coding efficiency while the encoding complexity is increased significantly. In this paper, a simple conditional probability to predict the early termination condition of recursive unit structure is introduced. The proposed conditional probability is estimated based on Bayes' formula from local statistics of rate-distortion costs in encoder. Experimental results show that the proposed method can reduce the total encoding time by about 32% according to the test configuration while the coding efficiency loss is 0.4%-0.5%. In addition, the encoding time can be reduced by 50% with 0.9% coding efficiency loss when the proposed method was used jointly with HM4.0 early CU termination algorithm.

VHDL Design of Pragmatic Trellis Coded Modulation for Adaptive Satellite Broadcasting (적응형 위성방송용 프레그메틱 트렐리스 부호화기 VHDL 설계)

  • 정지원
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.12
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    • pp.1256-1263
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    • 2003
  • In this paper, we analyzed the channel coding scheme of DVB and ISDB standard for high-speed satellite broadcasting. Also, this paper proposed optimal parameters of decoder with variable coding rate for implementation. According to the optimal parameters, the pragmatic TCM of rate 213, 5/6, 819 was modeled by VHDL. The results designed by VHDL can be verified.

Fast 3D Mesh Compression Using Shared Vertex Analysis

  • Jang, Euee-Seon;Lee, Seung-Wook;Koo, Bon-Ki;Kim, Dai-Yong;Son, Kyoung-Soo
    • ETRI Journal
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    • v.32 no.1
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    • pp.163-165
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    • 2010
  • A trend in 3D mesh compression is codec design with low computational complexity which preserves the input vertex and face order. However, this added information increases the complexity. We present a fast 3D mesh compression method that compresses the redundant shared vertex information between neighboring faces using simple first-order differential coding followed by fast entropy coding with a fixed length prefix. Our algorithm is feasible for low complexity designs and maintains the order, which is now part of the MPEG-4 scalable complexity 3D mesh compression standard. The proposed algorithm is 30 times faster than MPEG-4 3D mesh coding extension.