• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.1
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• pp.1-11
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• 1997

A BiCMOS circuit consists of the CMOS part which performs the logic function, and the bipolar part which drives output load. In BiCMOS circuits, transistor stuck-open faults exhibit delay faults in addition to sequential beavior. Also, stuck-on faults enhanced IDDQ (quiscent power supply current) at steady state. In this paper, a method is proposed which efficiently generates test patterns to detect stuck-open faults and stuck-on faults in BiCMOS circuits. The proposed method divides the BiCMOS circuit into pull-up part and pull-down part, and generates test patterns detect faults occured in each part by structural property of the BiCMOS circuit.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.11
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• pp.1434-1444
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• 1995

Current test has recently been known to be a promising testing method in CMOS VLSI because conventional voltage test can not make sure of the complete detection of bridging, gate-oxide shorts, stuck-open faults and etc. This paper presents a new BIC(built-in current sensor) for the internal current test in CMOS logic circuit. A single phase clock is used in the BIC to reduce the control circuitry of it and to perform a self- testing for a faulty current. The BIC is designed to detect the faulty current at the end of the clock period, so that it can test the CUT(circuit under test) with much longer critical propagation delay time and larger area than conventional BICs. The circuit is composed of 18 devices and verified by using the SPICE simulator.

• Journal of Advanced Marine Engineering and Technology
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• v.25 no.2
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• pp.375-382
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• 2001

In this study, an adapted Turbo Coding Algorithm for reducing communication error of a fire detection system for marine vessels, especially image transmission via power lone. Because it is necessary that this system communicate larger and faster than previous method, this study carried out enhancement a decoding speed by adaptation CRC with Turbo Code Algorithm, improvement of metric method, and reduction of decoding delay by using of Center-to-Top method. And the results are as follows: (1) Confirmed that a Turbo Code is so useful methods for reducing communication error in lots of noise environments. (2)Proposed technology in this study speed increasing method of Turbo Coding Algorithm proves 2 times faster than normal Turbo Code and communication error reducing as well in the board made by VHDL software & chips ALTERA company.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.8
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• pp.1464-1474
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• 1994

GPS(Global Positioning System)is a satellite-based navigation system that we can survey where we are, anywhere and anytime. In this paper, delay-lock loop of the receiver which detects the navigation data is theoretically analyzed, and designed using the digital logic circuit. Also logic operations for the synchronization are analyzed. The designed system consists of the correlator which correlates the received C/A code and the generated C/A code in the receiver, the C/A code generator which generates C/A code of selected satellite, and the direct digital clock syntheizer which generates the clock of the C/A code generator to control the C/A code phase and clock rate. From the analyses results of the proposed digital delay-lock loop system, the system has the detection propertied over 90% when its input signal power is above-113.98dB. The influence of input signal variation of digital delay loop, which is the input of A/D converter, is investigated and the performance is analyzed with the variation of threshold level via the computer simulation. The logic simulation results show that the designed system detects precisely the GPS navigation data.

• Journal of the Korean Society of Safety
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• v.29 no.5
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• pp.54-59
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• 2014

The record type receivers that are operated in large industrial sites have strength in preventing fire. However, because of its long circuit lines and multiple detectors, the receivers are vulnerable to lightning, noise, and breakdown of equipments, resulting in malfunction. In case of malfunctioning of detection circuits of main protection areas, such as electrical room and server room, potential release of gaseous extinguisher agents may lead to property and life damage. In this paper, we present the results on the characteristics of the transponder that initiates the solenoid valves, with respect to various electromagnetic and lightning inflow conditions. Based on the measured data, we analyzed the systematic problems of the transponder. In order to prevent receiver malfunctions, a sequential circuit was configured with two additional transponders and a timer. The circuit was tested with a simulator with preference and delay circuit algorithms.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.12
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• pp.229-240
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• 1995

This paper proposes a new weighted random pattern testing technique to detect path delay faults in combinational logic circuits. When computing the probability of signal transition at primitive logic elements of CUT(Circuit Under Test) by the primary input, the proposed technique uses the information on the structure of CUT for initialization vectors and vectors generated by pseudo random pattern generator for test vectors. We can sensitize many paths by allocating a weight value on signal lines considering the difference of the levels of logic elements. We show that the proposed technique outperforms existing testing method in terms of test length and fault coverage using ISCAS '85 benchmark circuits. We also show that the proposed testing technique generates more robust test vectors for the longest and near-longest paths.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.4
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• pp.219-225
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• 2014

The New efficient Mux-based scan latch cell design and scan test of LOS/LOC modes are proposed for detection of delay faults in digital logic circuits. The proposed scan cell design can support LOS(Launch-off-Shift) and LOC(Launch-off-Capture) tests with high fault coverage and low scan power and it can alleviate the problem of the slow selector enable signal and hold signal by supporting the logic capable of switching at the operational clock speeds. Also, it efficiently controls the power dissipation of the scan cell design during scan testing. Functional operation and timing simulation waveform for proposed scan hold cell design shows improvement in at-speed test timing in both test modes.

• Journal of Digital Convergence
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• v.16 no.12
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• pp.309-315
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• 2018

In this paper, propose an efficient arc detection and control method to achieve fast machining speed, improved precision and surface roughness in discharge machining, especially for carbide and hard material processing and metal processing using discharge phenomenon as energy. A single discharge waveform is divided into three sections of Td (Time-Delay), Ton (Time-on) and Toff (Time-off) and the gate control timing is simulated using the HDL language. In this paper, we analyze the effect of the gap between the electrode and the workpiece on the machining results by determining the operation of the servo mechanism by sampling the Td section through the comparator circuit. As a result of the analysis, the Td section of the formed waveform was more precisely sampled at a high speed and the results were improved when applied to the gap control between the electrode and the workpiece.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.23 no.6
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• pp.539-546
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• 2014

This paper describes an ultra-precision electronic clinometer, which is based on the capacitive-based fluid type, for detection of small inclination angles. The main parts of the clinometer low-noise electronics are two capacitance measurement circuits for converting the capacitances of the capacitors of the clinometer into voltages, and a differential amplifier for obtaining the difference of the capacitances, which is proportional to the input inclination angle. A 16 bit analog to digital (AD) converter is also embedded into the same circuit board, whose output is sent to a PC via RS-232C, for achieving a small noise level down to tens of ${\mu}v$. A compensation method, which is referred to as the delay time method for shortening the stabilization time of the sensor was also discussed. Experimental results have shown the possibility of achieving a measurement resolution of $0.0001^{\circ}$ as well as the quick measurement with the delay time method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6A
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• pp.820-831
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• 1999

In this paper, we have compared the performance of a D-TDMA protocol with that of a CDMA protocol, in radio access system for integrated voice/data services.The D-TDMA protocol is based on a generic dynamic channel assignment approach to be followed a combination of “circuit mode” reservation for voice calls, along with dynamic first-come-first served assignment of remaining capacity for data messages. In the CDMA protocol, we have used the voice activity detection to reduce the interface power of other mobiles in internal and external cells, and analyzed the interference power ratio. Also we have computed BER(Bit Error Rate) by using this interference power ratio and evaluated voice blocking probability(voice packet loss probability) and data transmission delay, according to average data length and average data arrival rate.We have found the CDMA protocol achieves comparatively higher performance for short data length, regardless of data arrival rate. Otherwise, the data transmission delay of D-TDMA protocol is shorter than that of the CDMA protocol for long data message.