• Title/Summary/Keyword: Data converter

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Development of a Management Tool of CCD/CCR-centric Standard Clinical Document (CCD/CCR 중심의 표준진료문서 관리 도구의 개발)

  • Lee, In-Keun;Cho, Hune;Kim, Hwa-Sun
    • Journal of the Korean Institute of Intelligent Systems
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    • v.22 no.4
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    • pp.507-514
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    • 2012
  • XML-based standards such as CCD(Continuity of Care Document) and CCR(Continuity of Care Record) have been developed for representation, integration, and exchange of personal health record(PHR), and various of researches on PHR based on the standards have been conducted. These researches have developed and used CCD/CCR parsers each with their own different ways, but it can be hard to develop and update the parsers because of the structural complexity of the standards. Moreover, inter-exchange between CCD and CCR documents in the PHR-related medical information systems should be possible for the interoperability of the systems. Therefore, we proposed a designing method to develop the tools treating XML-based CCD/CCR documents. And we implemented CCD/CCR parser based on the proposed method and developed a converter from CCD to CCR using the parsers. To confirm the usefulness of the developed tool, we performed an experiment of creating CCD documents using the personal health data gathered from chronically ill patients in Kyungpook National University Hospital and of converting from the CCD documents to CCR documents.

The Analysis of Total Ionizing Dose Effects on Analog-to-Digital Converter for Space Application (우주용 ADC의 누적방사선량 영향 분석)

  • Kim, Tae-Hyo;Lee, Hee-Chul
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.6
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    • pp.85-90
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    • 2013
  • In this paper, 6bit SAR ADC tolerant to ionizing radiation is presented. Radiation tolerance is achieved by using the Dummy Gate Assisted (DGA) MOSFET which was proposed to suppress the leakage current induced by ionizing radiation and its comparing sample is designed with the conventional MOSFET. The designed ADC consists of binary capacitor DAC, dynamic latch comparator, and digital logic and was fabricated using a standard 0.35um CMOS process. Irradiation was performed by Co-60 gamma ray. After the irradiation, ADC designed with the conventional MOSFET did not operate properly. On the contrary, ADC designed with the DGA MOSFET showed a little parametric degradation of which DNL was increased from 0.7LSB to 2.0LSB and INL was increased from 1.8LSB to 3.2LSB. In spite of its parametric degradation, analog to digital conversion in the ADC with DGA MOSFET was found to be possible.

Design and Implementation of EDI Document Exchange system based on XML (XML에 기반한 EDI 문서교환 시스템 설계 및 구현)

  • Im, Young-Tae;Han, Woo-Yong;Jung, Hoe-Kyung
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.11S
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    • pp.3603-3612
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    • 2000
  • This paper presents is for the design and implementation of EDI document exchange system based on XML To create a customized document of the users' choice, it designed and created the transaction processor and the template manager, and to make it accessable with the original EDI, a converter function is included, Also, on this system, this protocol stores EDI message structure that needed to exchange as XML format and controls it as DOM API for user can use previous system, And provides interface for user can create template files with converter and transfer necessary elements that can be chosen by user. For this purpose, This system proposes a shows structure information and document converting mechanism solution of EDI documents based on by using XML which does not show proper document conversion mechanism solution in other system so far.

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Ultra low-power active wireless sensor for structural health monitoring

  • Zhou, Dao;Ha, Dong Sam;Inman, Daniel J.
    • Smart Structures and Systems
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    • v.6 no.5_6
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    • pp.675-687
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    • 2010
  • Structural Health Monitoring (SHM) is the science and technology of monitoring and assessing the condition of aerospace, civil and mechanical infrastructures using a sensing system integrated into the structure. Impedance-based SHM measures impedance of a structure using a PZT (Lead Zirconate Titanate) patch. This paper presents a low-power wireless autonomous and active SHM node called Autonomous SHM Sensor 2 (ASN-2), which is based on the impedance method. In this study, we incorporated three methods to save power. First, entire data processing is performed on-board, which minimizes radio transmission time. Considering that the radio of a wireless sensor node consumes the highest power among all modules, reduction of the transmission time saves substantial power. Second, a rectangular pulse train is used to excite a PZT patch instead of a sinusoidal wave. This eliminates a digital-to-analog converter and reduces the memory space. Third, ASN-2 senses the phase of the response signal instead of the magnitude. Sensing the phase of the signal eliminates an analog-to-digital converter and Fast Fourier Transform operation, which not only saves power, but also enables us to use a low-end low-power processor. Our SHM sensor node ASN-2 is implemented using a TI MSP430 microcontroller evaluation board. A cluster of ASN-2 nodes forms a wireless network. Each node wakes up at a predetermined interval, such as once in four hours, performs an SHM operation, reports the result to the central node wirelessly, and returns to sleep. The power consumption of our ASN-2 is 0.15 mW during the inactive mode and 18 mW during the active mode. Each SHM operation takes about 13 seconds to consume 236 mJ. When our ASN-2 operates once in every four hours, it is estimated to run for about 2.5 years with two AAA-size batteries ignoring the internal battery leakage.

A Multi-Harvested Self-Powered Sensor Node Circuit (다중 에너지 수확을 이용한 자가발전 센서노드 회로)

  • Seo, Yo-han;Lee, Myeong-han;Jung, Sung-hyun;Yang, Min-Jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.585-588
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    • 2014
  • This paper presents a self-powered sensor node circuit using photovoltaic and vibration energy harvesting. The harvested energy from a solar cell and a vibration device(PZT) is stored in a storage capacitor. The stored energy is managed by a PMU(Power Management Unit). In order to supply a stable voltage to the sensor node, an LDO(Low Drop Out Regulator) is used. The LDO drives a temperature sensor and a SAR ADC(Successive Approximate Register Analog-to-Digital Converter), and 10-bit digital output data corresponding to current temperature is obtained. The proposed circuit is designed in a 0.35um CMOS process, and the designed chip size including PADs is $1.1mm{\times}0.95mm$.

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Log Count Rate Circuits for Checking Electronic Cards in Low Frequency Band Reactor Power Monitoring (저주파수대의 원자로 출력신호 점검을 위한 대수 카운트레이트 회로)

  • Kim, Jong-ho;Che, Gyu-shik
    • Journal of Advanced Navigation Technology
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    • v.24 no.6
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    • pp.557-565
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    • 2020
  • In order for thermal degradationIn, excore nuclear flux monitoring system, as a monitoring and signal processing methodology of reactor power, monitors neutron pulses generated during nuclear fission as frequency status, and converts them into DC voltage, and then log values resultantly. The methods realy applied in the nuclear power plant are to construct combination of counters and flip-flops, or diodes and capacitors up to now. These methodes are reliable for relative high frequencies, while not credible for reasonable low frequencies or extreme low values. Therefore, we developed the circuit that converts frequencies into DC voltages, into and into log DC values in the wide range from low Hz to several hundred high kHz. We proved their validities through testing them using real data used in nuclear power plant and analyzed their results. And, these methods will be used to measure the neutron level of excore nuclear flux monitoring system in nuclear power plant.

Design and Implementation of File Conversion System for Efficient Upload of Vehicle Operation Data (차량운행 데이터의 효율적인 업로드를 위한 파일변환 시스템 설계 및 구현)

  • Ahn, Jungsub;Ha, Ilkyu
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.3
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    • pp.536-542
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    • 2016
  • Freight and passenger transport operators must converts the operation records of digital operation recording device (Digital Tachograph) that is mounted on their vehicle in a certain format, and report them to governmental agencies. However, for most of the individual carrier who cannot access a computer environment easily and are not familiar with the use of computer, it has given a big inconvenience to them because the procedures for entering the data obtained from the operation are so complicate. Therefore, in this study, a mobile system for converting the operation record file to request form of a government agency is designed and developed, so that the converted file can be submitted to the government agency in a simple way through the personal mobile device. By entering the data obtained from an actual operation recording device into the system, converting the data in the proposed algorithms, and checking the contents of the converted file in data viewer, it was confirmed that the proposed functions is working properly in the system.

Multi-Channel Data Acquisition System Design for Spiral CT Application

  • Yoo, Sun-Won;Kim, In-Su;Kim, Bong-Su;Yun Yi;Kwak, Sung-Woo;Cho, Kyu-Sung;Park, Jung-Byung
    • Proceedings of the Korean Society of Medical Physics Conference
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    • 2002.09a
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    • pp.468-470
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    • 2002
  • We have designed X-ray detection system and multi-channel data acquisition system for Spiral CT application. X-ray detection system consists of scintillator and photodiode. Scintillator converts X-ray into visible light. Photodiode converts visible light into electrical signal. The multi-channel data acquisition system consists of analog, digital, master and backplane board. Analog board detects electrical signal and amplifies signal by 140dB. Digital board consists of MUX(Multiplex) which routes multi-channel analog signal to preamplifier, and ADC(Analog to Digital Converter) which converts analog signal into digital signal. Master board supplies the synchronized clock and transmits the digital data to image reconstructor. Backplane provides electrical power, analog output and clock signal. The system converts the projected X-ray signal over the detector array with large gain, samples the data in each channel sequentially, and the sampled data are transmitted to host computer in a given time frame. To meet the timing limitation, this system is very flexible since it is implemented by FPGA(Field Programmable Gate Array). This system must have a high-speed operation with low noise and high SNR(signal to noise ratio), wide dynamic range to get a high resolution image.

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Optical Clock Recovery from RZ and NRZ data using a Multi-Section Laser Diode with a DFB Reflector (DFB 반사기가 집적된 다중전극 레이저 다이오드를 이용한 RZ 및 NRZ 데이터 신호의 광클럭 재생)

  • Jeon, Min-Yong;Leem, Young-Ahn;Kim, Dong-Churl;Sim, Eun-Deok;Kim, Sung-Bock;Park, Kyung-Hyun;Yee, Dae-Su
    • Korean Journal of Optics and Photonics
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    • v.17 no.1
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    • pp.68-74
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    • 2006
  • We have extracted an optical clock signal from a return-to-zero(RZ) pseudorandom bit sequence(PRBS) and non-return-to-zero(NRZ) PRBS data in a pulsation multi-section laser diode with DFB reflector. The ms timing jitter achieved less than 1 ps for the input 11.727 Gbit/s RZ PRBS and NRZ PRBS data. The PRE data wasconverted from the NRZ data using an NRZ to pseudo-return to zero(PRZ) converter module. The optical clock was extracted from the PRZ data which contains the clock components. Although the input PRZ data gives a timing jitter of 2 ps, the extracted clock has timing jitter of ${\~}$1 ps.

Floating Point Converter Design Supporting Double/Single Precision of IEEE754 (IEEE754 단정도 배정도를 지원하는 부동 소수점 변환기 설계)

  • Park, Sang-Su;Kim, Hyun-Pil;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.10
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    • pp.72-81
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    • 2011
  • In this paper, we proposed and designed a novel floating point converter which supports single and double precisions of IEEE754 standard. The proposed convertor supports conversions between floating point number single/double precision and signed fixed point number(32bits/64bits) as well as conversions between signed integer(32bits/64bits) and floating point number single/double precision and conversions between floating point number single and double precisions. We defined a new internal format to convert various input types into one type so that overflow checking could be conducted easily according to range of output types. The internal format is similar to the extended format of floating point double precision defined in IEEE754 2008 standard. This standard specifies that minimum exponent bit-width of the extended format of floating point double precision is 15bits, but 11bits are enough to implement the proposed converting unit. Also, we optimized rounding stage of the convertor unit so that we could make it possible to operate rounding and represent correct negative numbers using an incrementer instead an adder. We designed single cycle data path and 5 cycles data path. After describing the HDL model for two data paths of the convertor, we synthesized them with TSMC 180nm technology library using Synopsys design compiler. Cell area of synthesis result occupies 12,886 gates(2 input NAND gate), and maximum operating frequency is 411MHz.