• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.371-372
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• 2013

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2009.06a
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• pp.531-532
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• 2009

• Journal of Power Electronics
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• v.11 no.2
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• pp.113-119
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• 2011

This paper presents a DSP based direct digital control design and implementation for a high power boost converter. A single loop and dual loop voltage control are digitally implemented and compared. The real time workshop (RTW) is used for automatic real-time code generation. Experimental results of a 20 kW boost converter based on the TMS320F2808 DSP during reference voltage changes, input voltage changes, and load disturbances are presented. The results show that the dual loop control achieves better steady state and transient performance than the single loop control. In addition, the experimental results validate the effectiveness of using the RTW for automatic code generation to speed up the system implementation.

• Journal of Power Electronics
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• v.7 no.1
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• pp.1-12
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• 2007

Novel nonlinear backstepping control with integrated adaptive control function is developed for high-performance positioning control systems. The proposed schemes are synthesized by a systematic approach and implemented based on a modern low-cost DSP controller, TMS320C32. A baseline backstepping control scheme is derived first, and is then extended to include a nonlinear adaptive control against the system parameter changes and load variations. The backstepping control utilizes Lyapunov function to guarantee the convergence of the position tracking error. The final control algorithm is a convenient in the implementation of a practical 32-bit DSP controller. The new control system can achieve superior performance over the conventional nested PI controllers, with improved position tracking, control bandwidth, and robustness against external disturbances, which is demonstrated by experimental results.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.69-72
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• 2003

본 논문에서는 범용 DSP를 이용한 잡음환경에 강인한 음성인식 시스템을 구현하였다. 구현된 시스템은 TI사의 범용 DSP인 TMS320C32를 이용하였고, 실시간 음성 입력을 위한 음성 Codec과 외부 인터페이스를 확장하여 인식결과를 출력하도록 구성하였다. 또한, 기존의 음성 인식 시스템에 사용한 파라메터에 대한 고찰과 ICA를 이용하여 잡음 환경에 강인한 음성 특징 파라메터를 제안하고 성능 비교 실험을 하였다. 제안된 ICA 파라메터를 적용하여 음성인식 시스템을 구현하였다. 그리고, 독립적으로 동작 가능한 음성인식 시스템의 응용 예로 무선자동차에 적용시켜 실험했다.

• Proceedings of the Korean Information Science Society Conference
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• 2003.10c
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• pp.316-318
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• 2003

JPEG 2000표준을 이용하여 계산상 효율적이면서도 DSP에 적합한 영상 압축 알고리즘을 개발한다. 개발될 기법이 갖는 가장 큰 장점은 비교적 복잡한 연산량을 필요로 하여 실시간 동영상 부호화기에 사용되지 못하고 있는 JPEG 2000 알고리즘을 DSP에 맞게 구현함으로써 고화질의 동영상을 실시간으로 처리할 수 있게 한다. 또한 사용자의 요구 및 사양에 맞추어 보다 효과적으로 컨텐츠를 제공하기 위해, 시, 공간적 스케일러비티를 지원하는 코덱을 개발하여 사용자의 요구와 필요 서비스에 따라 적절한 품질의 비디오를 제공함으로써 더 많은 응용에 쉽게 적용시킬 수 있는 방법들을 제시한다.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.661-664
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• 2000

This paper presents a digital instrument for the power quality analysis in three phase power system where current waveform is non-sinusoidal. It is based on C31 DSP and on a special high-speed data acquisition system. Voltage and current waveforms are acquired and processed by using a simple average power algorithm, The paper also goes on to discuss the performance of an instrument prototype both in terms of accuracy and speed of measurement.

• Journal of Korea Society of Digital Industry and Information Management
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• v.15 no.4
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• pp.85-92
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• 2019

This paper presents a SDR-based Long Term Evolution Advanced (LTE-A) Physical Downlink Shared Channel (PDSCH) decoder using a multicore Digital Signal Processor (DSP). For decoder implementation, multicore DSP TMS320C6670 is used, which provides various hardware accelerators such as turbo decoder, fast Fourier transformer and Bit Rate Coprocessors. The TMS320C6670 is a DSP specialized in implementing base station platforms and is not an optimized platform for implementing mobile terminal platform. Accordingly, in this paper, the hardware accelerator was changed to the terminal implementation to implement the LTE-A PDSCH decoder supporting the multi-antenna and the functions not provided by the hardware accelerator were implemented through core programming. Also pipeline using multicore was implemented to meet the transmission time interval. To confirm the feasibility of the proposed implementation, we verified the real-time decoding capability of the PDSCH decoder implemented using the LTE-A Reference Measurement Channel (RMC) waveform about transmission mode 2 and 3.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.2
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• pp.228-234
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• 2006

This paper describes a systematic process which can generate a complete circuit specification efficiently for a given recursive DSP algorithm based on an optimal multiprocessor scheduler. The process is composed of two states: scheduling and circuit synthesis. The scheduling part accepts a fully specified flow graph(FSFG) as an input, and generates an optimal synchronous multiprocessor schedule. Then the circuit synthesis part translates the modified schedule into a complete circuit diagram including a control specification. The circuit diagram can be applied to a silicon compiler for VLSI layout generation. This paper illustrates the whole process with an example of a second order Gray-Market lattice filter.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.5
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• pp.817-826
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• 2023

In this paper, a fault determination methodology based on an artificial neural network was proposed to protect the system from faults on the lines in the smart grid distribution system. In the proposed methodology, first, it was designed to determine whether there is a low impedance line fault (LIF) based on the magnitude of the current RMS value, and if it is determined to be a normal current, it was designed to determine whether a high impedance ground fault (HIF) is present using Normal/HIF classifier based on artificial neural network. Among repetitive DSP module-based algorithm verification tests, the normal/HIF classifier recognized the current waveform as normal and did not show reclosing operation for the cases of normal state current waveform simulation test where the RMS value was smaller than the minimum operating current value. On the other hand, for the cases of LIF where RMS value is greater than the minimum operating current value, the validity of the proposed methodology could be confirmed by immediately recognizing it as a fault state and showing reclosing operation according to the prescribed procedure.