• 전자공학회논문지A
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• 제30A권1호
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• pp.8-15
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• 1993

A concrete disign of memory circuit is presented aiming at the application of sliding diagonal test patterns. A modification of sliding diagonal test pattern includes the complexity reduction from O(n$^{32}$) to O(n) using parallel test memory concept. The control circuit design was based on delay-element, and verified via logic and circuit simulation. Area overhead was evaluated based on physical layout using a 0.7 micron design rule resulting in about 1% area increase for a typical 16Mbit DRAM.

• 대한전자공학회논문지SD
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• 제46권3호
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• pp.1-9
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• 2009

본 논문에서는 MOS 트랜지스터가 FN 스트레스에 의해 문턱전압이 이동하는 현상을 이용하여 비교기 회로의 옵셋을 제거하는 방법을 소개하고, 이를 비교기 회로의 성능개선에 적용해 보인 결과를 보인다. 옵셋이 성능을 저하시키는 대표적인 회로인 DRAM의 비트라인 감지증폭기에 적용하여 옵셋을 제거하는 방법을 설명하고, 테스트 회로를 제작 및 측정하는 실험을 통해서 이를 검증한다. 본 방식은 래치구조가 포함된 모든 형태의 비교기에 적용가능하며, 스트레스-패킷이라고 명명한 형태의 스트레스 바이어스 시퀀스를 통해 다양한 초기 옵셋값을 가지는 많은 숫자의 비교기가 동시에 거의 제로 옵셋으로 수렴할 수 있음을 보인다. 또한 이 방법을 비교기 회로에 적용하는데 있어서 고려해야 할 몇 가지 신뢰도 조건에 대해서도 고찰한다.

• 한국광학회지
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• 제18권1호
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• pp.74-78
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• 2007

본 논문에서는 포토마스크 후면에 위상 패턴을 형성하여 웨이퍼 상 CD(critical dimension) 균일도를 개선할 수 있는 투과율 조절 포토마스크 기술을 ArF 리소그래피에 적용한 결과에 대하여 보고한다. 위상 패턴 조밀도에 따른 노광 광세기 변화 계산에 포토마스크 후면으로부터 포토마스크 전면까지의 광의 전파를 고려하여 ArF 파장에서의 위상 패턴 조밀도에 따른 노광 광세기 저하에 관한 실험결과를 이론적으로 재현할 수 있었다. 본 기술을 ArF 리소그래피에 적용하여 DRAM(Dynamic Random Access Memory)의 한 주요 레이어에 대해 필드 내 CD 균일도를 $3{\sigma}$ 값으로 13.8 nm에서 9.7 nm로 개선하였다.

• 한국진공학회지
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• 제4권S1호
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• pp.145-150
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• 1995

PZT thin films were fabricated on Pt/Ti/SiO2/Si substrates at $500^{\circ}C$ by ECR-PECVD for the application to the charge storage capacitor of ULSI DRAMs. Perovskite single phase PZT films were obtained by controling the film compositional ratio Pb/(Zr+Ti) close to 1. The anion concentrations in the PZT films were successfully controlled by adjusting the flow rates of each MO sources. Capacitance of a typical 94 nm thick PZT film prepared at $500^{\circ}C$ in this work was about 5.3 uF/$\textrm{cm}^2$, which corresponds to the equivalent SiO2 thickness of 0.65nm.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권3호
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• pp.197-204
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• 2002

DRAM, SRAM, and FLASH memory are three major memory devices currently used in most electronic applications. But, they have very distinct attributes, therefore, each memory could be used only for limited applications. MRAM (Magneto-resistive Random Access Memory) is a promising candidate for a universal memory that meets all application needs with non-volatile, fast operational speed, and low power consumption. The simplest architecture of MRAM cell is a series of MTJ (Magnetic Tunnel Junction) as a data storage part and MOS transistor as a data selection part. To be a commercially competitive memory device, scalability is an important factor as well. This paper is testing the actual electrical parameters and the scaling factors to limit MRAM technology in the semiconductor based memory device by an actual integration of MRAM core cell. Electrical tuning of MOS/MTJ, and control of resistance are important factors for data sensing, and control of magnetic switching for data writing.

• International Journal of Aeronautical and Space Sciences
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• 제5권2호
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• pp.28-34
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• 2004

One of the major problem encountered in nuclear plants and satellites design isEMI (Electro-Magnetic Interference) and EMC (Electro-Magnetic Compatibility).Here, our focus is to implement the test board for checking SEU (Single EventUpsets); the effects of protons on the electronic system. The SEU results from thelevel change of stored information due to photon radiation and temperature in thespace environment. The impact of SEU on PLD (Programmable Logic Devices)technology is most apparent in ROM/SRAM/DRAM devices wherein the state ofstorage cell can be upset. In this paper, a simple and powerful test techniques issuggested, and the results are presented for the analysis and future reference. In ourexperiment, the proton radiation facilitv (having the energy of 50 MeV with a beamcurrent of 60 uA of cyclotron) available at KIRAMS (Korea Institute of RadiologicalMedical Sciences) has been applied on a commercially available SRAM manufacturedby Hynix Semiconductor Company.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.240-243
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• 1999

(Sr$\sub$0.85/Ca$\sub$0.15/)TiO$_3$thin films were deposited on Pt-coated TiO$_2$/SiO$_2$/Si wafer by the rf sputtering method. Experiments were conducted to investigate the electrical properties of SCT thin films with various top electrode. C-F and C-V measurements show that SCT thin films annnealed at 600$^{\circ}C$ have a larger capacitance than SCT thin films deposited at 400$^{\circ}C$ , and there is nearly no difference between top electrodes. I-V measurement show that Pt top electrode have a good leakage current density of < 10nA/$\textrm{cm}^2$,. making them suitable for DRAM application.

• 진공이야기
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• 제1권3호
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• pp.4-8
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• 2014

Since the modern computer architecture was suggested by Von Neumann in 1945, computer has become inevitable for our life. This brilliant growth of computer has been led by device miniaturization trend, so called Moore's law. Especially, the explosive growth of memory devices such as DRAM and Flash have played key role in huge enlarging utilization of computer. However, abrupt increase of data used for many applications in big data era provoke the excessive energy consumption of data center which results from the inefficiency of conventional memory-storage hierarchy. As a solution, the application of new memory devices has been brought up for innovative memory-storage hierarchy. In this paper, the current development status and prospect of new memory devices will be discussed.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제53권3호
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• pp.128-132
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• 2004

The perovskite ferroelectric materials of the PZT, SBT and BST series will attract much attention for application to ULSI devices. Among these materials, the BST ($Ba_0.6$$Sr_0.4$/$TiO_3$) is widely considered the most promising for use as an insulator in the capacitors of DRAMS beyond 1 Gbit and high density FRAMS. Especially, BST thin films have a good thermal-chemical stability, insulating effect and variety of Phases. However, BST thin films have problems of the aging effect and mismatch between the BST thin film and electrode. Also, due to the high defect density and surface roughness at grain boundarys and in the grains, which degrades the device performances. In order to overcome these weakness, we first applied the chemical mechanical polishing (CMP) process to the polishing of ferroelectric film in order to obtain a good planarity of electrode/ferroelectric film interface. BST ferroelectric film was fabricated by the sol-gel method. And then, we compared the surface characteristics before and after CMP process of BST films. We expect that our results will be useful promise of global planarization for FRAM application in the near future.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2011년도 춘계학술발표대회
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• pp.28.2-28.2
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• 2011

Resistance random access memory (ReRAM) is a promising candidate for next-generation nonvolatile memory because of its advantageous qualities such as simple structure, superior scalability, fast switching speed, low-power operation, and nondestructive readout. We investigated the resistive switching behavior of tantalum oxide that has been widely used in dynamic random access memories (DRAM) in the present semiconductor industry. As a result, it possesses full compatibility with the entrenched complementary metal-oxide-semiconductor processes. According to previous studies, TiN is a good oxygen reservoir. The TiN top electrode possesses the specific properties to control and modulate oxygen ion reproductively, which results in excellent resistive switching characteristics. This study presents fully room temperature fabricated the TiN/$TaO_x$/Pt devices and their electrical properties for nonvolatile memory application. In addition, we investigated the TiN electrode dependence of the electrical properties in $TaO_x$ memory devices. The devices exhibited a low operation voltage of 0.6 V as well as good endurance up to $10^5$ cycles. Moreover, the benefits of high devise yield multilevel storage possibility make them promising in the next generation nonvolatile memory applications.