• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.534-537
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• 1997

Solar power systems have become popular in the modem electric energy system. In order to supply the DC power, generated by solar cells, to the electric power system, the solar power system requires DC-to-AC power conversion. A line-commutated inverter or a forced-commutated inverter can be used in the DC-to-AC power conversion. Because of the nonlinear V-I characteristics of the solar cells, multiple operating points determined by the control mode of the inverter exist in the DC V-I state plane of the solar power system. In this paper, the stability of utility-interactive solar power system with a line-commutated inverter is analyzed at various operating points, using the eigenvalue method and the state-plane analysis technique. The stability of a forced-commutated inverter case is also anaiyzed and compared to that of the line-commutated inverter case.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.12 no.4
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• pp.100-105
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• 1998

This paper proposes a new control strategy of bidirectional uninterruptible power supply (UPS) with the performance of active power filter which compensates the harmonics and reactive power. With only one power stage, it is working simultaneously as the AC/DC rectifier/battery charger and DC/AC inverter to the operation of battery charging or back-up power supplying. Therefore the operation of the proposed system can be divided into the modes, such as the active power filter mode and the battery back-up power mode. And a novel closed-loop control strategy is used to calculate the reference current. The performance of the proposed 5[kVA] system is verified by the simulation and experimental results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.10
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• pp.1835-1839
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• 2008

Power management is a very important issue in portable electronic applications. Portable electronic devices require very efficient power management like LDO to increase the battery life. As the voltage variation of battery power is large in the application of cell phone, camera, laptop, automotive, industry application and so on, battery power is not directly used and LDO is used to supply the power of internal circuit. Besides, LDO can supply DC voltage that is lower than bauer voltage and constant DC voltage that is not related to largely fluctuated battery power. In the study, the power-save mode current and IR-drop characteristics are analyzed from a LDO with on-chip fabricated in 0.18-um CMOS technology.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1543-1546
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• 2002

The expandable 4 bit adder/subtracter IC was designed using the adiabatic and dynamic CMOS logic (ADCL) circuit as the ultra-low power consumption basic logic circuit and the IC was fabricated using a standard 1.2 ${\mu}$ CMOS process. As the result the steady operation of 4 bit addition and subtraction has been confirmed even if the frequency of the sinusoidal supply voltage is higher than 10MHz. Additionally, by the simulation, at the frequency of 10MHz, energy consumption per operation is obtained as 93.67pJ (ar addition and as 118.67pJ for subtraction, respectively. Each energy is about 1110 in comparison with the case in which the conventional CMOS logic circuit is used. A simple and low power oscillation circuit is also proposed as the power supply circuit f3r the ADCL circuit. The oscillator operates with a less one volt of DC supply voltage and around one milli-watts power dissipation.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1619-1626
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• 2018

The output power of most facilities for renewable energy generation is unstable due to external environmental conditions. In distributed power systems with two or more sources, a stable output can be achieved with the complementary power supply among the different input sources. In this paper, a double-input DC-DC converter with a wide-input-voltage-range is proposed for renewable energy generation. This converter has the following advantages: the circuit is simple, and the input voltage range is wide and the fault tolerance is excellent. The operation modes and the steady-state analysis are examined. Finally, experimental results are illustrated to verify the correctness of the analysis and the feasibility of the proposed converter.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.2051-2054
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• 2004

This paper proposes a more accurate task level energy measurement technique for high speed microprocessors. The technique is based on the relationship of the amount of current consumed by the microprocessor and the pulse width of the power supply controller chip, employed in the synchronous buck DC-DC converter in the microprocessor's power supply. The accuracy of the measurement is accomplished by measuring variation in pulse width in each power supply cycle. The major advantage of this technique is that its accuracy does not depend on the operating frequency of the microprocessor. To prove the proposed technique, we implemented the measurement unit of the microprocessor energy meter using an FPGA chip operating at 50 MHz. Both static and dynamic load measurement are tested in order to obtain some behaviours. Moreover, various commercially available mainboards which employ synchronous buck regulators at 200 KHz switching frequency, were measured. The results agree with previous works with better accuracy at higher operating frequency.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.4
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• pp.255-261
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• 2004

This paper presents an improved droop method which minimizes the voltage droop of a parallel-connected power supply Conventionally, the droop method has been used to achieve a simple structure and no-interconnections among power sources. However, it has a trade-off between output voltage regulation and load sharing accuracy In this paper, the droop is minimized with a current and droop gain control using steady-stage estimation. The proposed method can achieve both good voltage regulation and good load sharing. A design example of two 10㎸, 100㎃ parallel modules is made and tested to verify the proposed current-sharing method.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.245-248
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• 2001

This paper is indicating the problems, which are the conduction loss on the high frequency transformer, the protection of rectification diode as the snubber loss and the stress of switching main devices, as be made high current and high speed in the phase-shift switching full-bridge DC-DC converter is used the power supply’s main circuit of high capacity. To improve those problems, in this paper, it is proposed that is the resonant circuit auxiliary can be reduced conduction losses and stabilized output control. And, it is constructed prototype of the power supply as the result of computer simulations.

• Proceedings of the KIEE Conference
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• summer
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• pp.1269-1271
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• 2004

This is a thesis experiment result which is reported with using 16-Bit microprocessor H8 series of Renesas company, organizing digital control which is practicable PWM embodiment, and applying switched-mode power supply. The basic topology consists of the active clamp forward DC-DC converter which is widely used for the highly efficient power supply these days. In an experiment, it incites the result to lay emphasis on the highly efficient operation of converter, and performance of digital control which is practicable PWM embodiment. And it is debated on performance of processor and condition for improving performance of part.

• Journal of Power Electronics
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• v.9 no.3
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• pp.396-402
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• 2009

A DC/DC converter generally needs to work under high switching frequency when used as an adjustable power supply to reduce the size of magnetic elements such as inductors, transformers and capacitors, but with the rising of the switch frequency, the switch losses will increase and the efficiency will reduce. Recently, to solve these problems, research is actively being done on a soft switching method that can be applied under high frequency and on a PWM converter that can be applied under low frequency such as a multi-level topology. In this paper a novel DC-DC conversion method for reducing the ripple of output voltage is proposed. In the proposed converter, buck converters are connected in series to generate the output voltage. By using this method, the ripple of output voltage can be reduced compared to a conventional buck converter. Particularly when output voltage is low, the number of acting switching elements is less and the result of ripple reduction is more obvious. It is expected that the converter proposed in this paper could be very useful in the case of wide-range output voltage.