• Title/Summary/Keyword: Cycle Simulation

Search Result 1,644, Processing Time 0.026 seconds

The Effect of Staggered Pedestrian Crossings at Wide Width Intersections (광폭교차로에서 2단 횡단보도 설치 효과분석)

  • Kim, Dong-Nyong;Hong, Yoo-Min
    • The Journal of The Korea Institute of Intelligent Transport Systems
    • /
    • v.10 no.5
    • /
    • pp.23-35
    • /
    • 2011
  • The pedestrian green time is usually long at wide width intersections. This sometimes causes the increase of delay on the whole intersection because of long cycle length and thus small g/C ratio on some direction. In this paper, to improve these problems, staggered pedestrian crossing was evaluated on the vehicular and pedestrian aspects. The results were gained by using both TRANSYT-7F and VISSIM model. The vehicle control delay of the staggered pedestrian crossing was estimated to be decreasing than that of the general pedestrian crossing by 14.9% to 85.6%. The pedestrian average delay of two pedestrian crossing systems was examined by analytical method and VISSIM. According to the analytical method there was no significant difference between each pedestrian crossing system. The pedestrian delay of staggered pedestrian crossing was from 13.4% to 22.3% than the general pedestrian crossing by VISSIM. In conclusion, the staggered pedestrian crossing was more effective than general pedestrian crossing for both the vehicle and the pedestrian. However this conclusion was resulted from micro simulation where traffic volume condition, v/c, was from 0.8 to 1.1.

The Design of 32 Bit Microprocessor for Sequence Control Using FPGA (FPGA를 이용한 시퀀스 제어용 32비트 마이크로프로세서 설계)

  • Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.40 no.6
    • /
    • pp.431-441
    • /
    • 2003
  • This paper presents the design of 32 bit microprocessor for a sequence control using a field programmable gate array(FPGA). The microprocessor was designed by a VHDL with top down method, the program memory was separated from the data memory for high speed execution of sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32 bits. And the real time debug operation was implemented for easeful debugging the designed processor with a single step run, PC break point run, data memory break point run. Also in this designed microprocessor, pulse instructions, step controllers, master controllers, BM and BCD type arithmetic instructions, barrel shift instructions were implemented for sequence logic control. The FPGA was synthesized under a Xilinx's Foundation 4.2i Project Manager using a V600EHQ240 which contains 600,000 gates. Finally simulation and experiment were successfully performed respectively. For showing good performance, the designed microprocessor for the sequence logic control was compared with the H8S/2148 microprocessor which contained many bit instructions for sequence logic control. The designed processor for the sequence logic showed good performance.

A 3.2Gb/s Clock and Data Recovery Circuit without Reference Clock for Serial Data Communication (시리얼 데이터 통신을 위한 기준 클록이 없는 3.2Gb/s 클록 데이터 복원회로)

  • Kim, Kang-Jik;Jung, Ki-Sang;Cho, Seong-Ik
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.46 no.2
    • /
    • pp.72-77
    • /
    • 2009
  • In this paper, a 3.2Gb/s clock and data recovery (CDR) circuit for a high-speed serial data communication without the reference clock is described This CDR circuit consists of 5 parts as Phase and frequency detector(PD and FD), multi-phase Voltage Controlled-Oscillator(VCO), Charge-pumps (CP) and external Loop-Filter(KF). It is adapted the PD and FD, which incorporates a half-rate bang-bang type oversampling PD and a half-rate FD that can improve pull-in range. The VCO consists of four fully differential delay cells with rail-to-rail current bias scheme that can increase the tuning range and tuning linearity. Each delay cell has output buffers as a full-swing generator and a duty-cycle mismatch compensation. This materialized CDR can achieve wide pull-in range without an extra reference clock and it can be also reduced chip area and power consumption effectively because there is no additional Phase Locked- Loop(PLL) for generating reference clock. The CDR circuit was designed for fabrication using 0.18um 1P6M CMOS process and total chip area excepted LF is $1{\times}1mm^2$. The pk-pk jitter of recovered clock is 26ps at 3.2Gb/s input data rate and total power consumes 63mW from 1.8V supply voltage according to simulation results. According to test result, the pk-pk jitter of recovered clock is 55ps at the same input data-rate and the reliable range of input data-rate is about from 2.4Gb/s to 3.4Gb/s.

Investigating Remotely Sensed Precipitation from Different Sources and Their Nonlinear Responses in a Physically Based Hydrologic Model (다른 원격탐사 센서로 추출한 강우자료의 이질성과 이에 의한 비선형유출반응에 미치는 영향)

  • Oh, Nam-Sun;Lee, Khil-Ha;Kim, Sang-Jun
    • Journal of Korea Water Resources Association
    • /
    • v.39 no.10 s.171
    • /
    • pp.823-832
    • /
    • 2006
  • Precipitation is the most important component to the study of water and energy cycle in hydrology. In this study we investigate rainfall retrieval uncertainty from different sources of remotely sensed precipitation field and then probable error propagation in the simulation of hydrologic variables especially, runoff on different vegetation cover. Two remotely sensed rainfall retrievals (space-borne IR-only and ground radar rainfall) are explored and compared visually and statistically. Then, an offline Community Land Model (CLM) is forced with in situ meteorological data to simulate the amount of runoff and determine their impact on model predictions. A fundamental assumption made in this study is that CLM can adequately represent the physical land surface processes. Results show there are big differences between different sources of precipitation fields in terms of the magnitude and temporal variability. The study provides some intuitions on the uncertainty of hydrologic prediction via the interaction between the land surface and near atmosphere fluxes in the modelling approach. Eventually it will contribute to the understanding of water resources redistribution to the climate change in Korean Peninsula.

Development of a Simulation Program for the Li-Reduction Process of PWR Spent Fuel (PWR 사용후핵연료의 Li 환원과정 모사 프로그램 개발)

  • Lee, Yun-Hee;Shin, Hee-Sung;Jang, Ji-Woon;Kim, Ho-Dong;Yoon, Ji-Sup
    • Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
    • /
    • v.4 no.4
    • /
    • pp.335-344
    • /
    • 2006
  • In this paper a computer program was developed, which simulates the Li reduction process of PWR spent fuel, and the amount of a produced metal or chloride compound was calculated at the various amount of Li with the program. It establishes a database, which is composed of some characteristics related to a chemical reaction equation and thermodynamic data, and it calculates the transformed rate of PWR spent fuel oxide at the certain amount of Li by using the database as input data. As the results of the performance test of the program, it was validated that the transformed values of oxides, except for $Eu_2O_3$ and $Sm_2O_3$, were almost the same to within about a 6 % error with those calculated by the previous code and that the calculated amount of Li was also exactly consistent with the theoretical one, which is used for a complete reaction of each oxide in a single chemical reaction. A relationship between Li and the transformed metal of each oxide was analyzed on the basis of the quantities calculated with the verified development program. Of the results, when the amount of Li was given to be 250 mole, the 83.73 percentage of $UO_2$ was transformed into U while the remainder was still to be $UO_2$. In addition, it was appeared that the 297 mole of Li was needed to completely convert $UO_2$ into U.

  • PDF

A Study on Development of ECS for Severly Handicaped (중증 장애인을 위한 생활환경 제어장치개발에 관한 연구)

  • 임동철;이행세;홍석교;이일영
    • Journal of Biomedical Engineering Research
    • /
    • v.24 no.5
    • /
    • pp.427-434
    • /
    • 2003
  • In this paper, we present a speech-based Environmental Control System(ECS) and its application. In the concrete, an ECS using the speech recognition and an portable wheelchair lift control system with the speech synthesis are developed through the simulation and the embodiment. The developed system apply to quadriplegic man and we evaluate the result of physical effect and of mental effect. Speech recognition system is constructed by real time modules using HMM model. For the clinical application of the device, we investigate the result applied to 54-years old quadriplegic man during a week through the questionnaires of Beck Depression Inventory and of Activity Pattern Indicator. Also the motor drive control system of potable wheelchair lift is implemented and the mechanical durability is tested by structural analysis. Speech recognition rate results in over 95% through the experiment. The result of the questionnaires shows higher satisfaction and lower nursing loads. In addition, the depression tendency of the subject were decreased. The potable wheelchair lift shows good fatigue life-cycle as the material supporting the upper wheelchair and shows the centroid mobility of safety. In this paper we present an example of ECS which consists of real-time speech recognition system and potable wheelchair lift. Also the experiments shows needs of the ECS for korean environments. This study will be the base of a commercial use.

A Study on the Effectiveness of Inter-temporal Reallocation of Fiscal Expenditure in Korea (재정지출의 시점 간 재원배분 조정에 따른 경기조절 효과성에 관한 연구)

  • Kim, SeongTae;Hur, Seok-Kyun
    • KDI Journal of Economic Policy
    • /
    • v.35 no.2
    • /
    • pp.71-105
    • /
    • 2013
  • Now that fiscal soundness is increasingly important influenced by the euro area fiscal crisis, early budget execution has been under the spotlight as a tool for economy control, other than typical expansionary method, such as supplementary budget. Basically, early budget execution is a fiscal policy instrument that reponses to economic fluctuations through modifying the inter-temporal allocation of fiscal expenditure within budget, without affecting fiscal soundness. This study empirically examines how effective the intert-temporal reallocation of fiscal expenditure is in economy control. Using Korea's Consolidated Fiscal data, the size of inter-temporal reallocation of fiscal expenditure is defined as changes of fiscal expenditure for one year excluding seasonal factors and used to explain real economic growth rate, a dependent variable. The result shows that the macroeconomic effect of the inter-temporal reallocation turns out meaningful in general, though some policy time lag exists. Meanwhile, a simulation using macroeconomic model finds that overall effect on economic growth is not large because increase in fiscal expenditure allocation at a certain point of time is canceled by the opposite direction within the same fiscal year. However, the inter-temporal reallocation is found to reduce volatility of key macroeconomic variables so as to contribute to partially stabilizing macroeconomy. In particular, such effect of economic stabilization seems to be highly apparent at the time of financial crisis, but not very noticeable in normal economic cycle.

  • PDF

Trigeneration Based on Solid Oxide Fuel Cells Driven by Macroalgal Biogas (거대조류 바이오가스를 연료로 하는 고체산화물 연료전지를 이용한 삼중발전)

  • Effendi, Ivannie;Liu, J. Jay
    • Clean Technology
    • /
    • v.26 no.2
    • /
    • pp.96-101
    • /
    • 2020
  • In this paper, the commercial feasibility of trigeneration, producing heat, power, and hydrogen (CHHP) and using biogas derived from macroalgae (i.e., seaweed biomass feedstock), are investigated. For this purpose, a commercial scale trigeneration process, consisting of three MW solid oxide fuel cells (SOFCs), gas turbine, and organic Rankine cycle, is designed conceptually and simulated using Aspen plus, a commercial process simulator. To produce hydrogen, a solid oxide fuel cell system is re-designed by the removal of after-burner and the addition of a water-gas shift reactor. The cost of each unit operation equipment in the process is estimated through the calculated heat and mass balances from simulation, with the techno-economic analysis following through. The designed CHHP process produces 2.3 MW of net power and 50 kg hr-1 of hydrogen with an efficiency of 37% using 2 ton hr-1 of biogas from 3.47 ton hr-1 (dry basis) of brown algae as feedstock. Based on these results, a realistic scenario is evaluated economically and the breakeven electricity selling price (BESP) is calculated. The calculated BESP is ¢10.45 kWh-1, which is comparable to or better than the conventional power generation. This means that the CHHP process based on SOFC can be a viable alternative when the technical targets on SOFC are reached.

Computational Analysis for a Molten-salt Electrowinner with Liquid Cadmium Cathode (액체 카드뮴 음극을 사용한 용융염 전해제련로 전산해석)

  • Kim, Kwang-Rag;Jung, Young-Joo;Paek, Seung-Woo;Kim, Ji-Yong;Kwon, Sang-Woon;Yoon, Dal-Seong;Kim, Si-Hyung;Shim, Jun-Bo;Kim, Jung-Gug;Ahn, Do-Hee;Lee, Han-Soo
    • Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
    • /
    • v.8 no.1
    • /
    • pp.1-7
    • /
    • 2010
  • In the present work, an electrowinning process in the LiCl-KCl/Cd system is considered to model and analyze the electrotransport of the actinide and rare-earth elements. A simple dynamic modeling of this process was performed by taking into account the material balances and diffusion-controlled electrochemical reactions in a diffusion boundary layer at an electrode interface between the molten salt electrolyte and liquid cadmium cathode. The proposed modeling approach was based on the half-cell reduction reactions of metal chloride occurring on the cathode. This model demonstrated a capability for the prediction of the concentration behaviors, a faradic current of each element and an electrochemical potential as function of the time up to the corresponding electrotransport satisfying a given applied current based on a galvanostatic electrolysis. The results of selected case studies including five elements (U, Pu, Am, La, Nd) system are shown, and a preliminary simulation is carried out to show how the model can be used to understand the electrochemical characteristics and provide better information for developing an advanced electrowinner.

An analysis of optimal design conditions of LDPC decoder for IEEE 802.11n Wireless LAN Standard (IEEE 802.11n 무선랜 표준용 LDPC 복호기의 최적 설계조건 분석)

  • Jung, Sang-Hyeok;Na, Young-Heon;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.14 no.4
    • /
    • pp.939-947
    • /
    • 2010
  • The LDPC(Low-Density Parity-Check) code, which is one of the channel encoding methods in IEEE 802.11n wireless LAN standard, has superior error-correcting capabilities. Since the hardware complexity of LDPC decoder is high, it is very important to take into account the trade-offs between hardware complexity and decoding performance. In this paper, the effects of LLR(Log-Likelihood Ratio) approximation on the performance of MSA(Min-Sum Algorithm)-based LDPC decoder are analyzed, and some optimal design conditions are derived. The parity check matrix with block length of 1,944 bits and code rate of 1/2 in IEEE 802.11n WLAN standard is used. In the case of $BER=10^{-3}$, the $E_b/N_o$ difference between LLR bit-widths (6,4) and (7,5) is 0.62 dB, and $E_b/N_o$ difference for iteration cycles 6 and 7 is 0.3 dB. The simulation results show that optimal BER performance can be achieved by LLR bit-width of (7,5) and iteration cycle of 7.