• Journal of IKEEE
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• v.15 no.4
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• pp.330-338
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• 2011

In this paper, a current-mode buck-boost converter using Multiple switching devices is presented. The efficiency of the proposed converter is higher than that of conventional buck-boost converter. In order to improve the power efficiency at the high current level, the proposed converter is controlled with PWM(pulse width modulation) method. The converter has maximum output current 300mA, input voltage 3.3V, output voltage from 700mV to 12V, 1.5MHz oscillation frequency, and maximum efficiency 90%. Moreover, this paper proposes watchdog circuits in order to ensure the reliability and to improve the performance of dc-dc converters. An electrostatic discharge(ESD) protection circuit for deep submicron CMOS technology is presented. The proposed circuit has low triggering voltage using gate-substrate biasing techniques. Simulated result shows that the proposed ESD protection circuit has lower triggering voltage(4.1V) than that of conventional ggNMOS(8.2V).

• Journal of IKEEE
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• v.9 no.1 s.16
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• pp.57-64
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• 2005

This paper presents a built-in current sensor(BICS) that detects defects in CMOS integrated circuits using the current testing technique. This circuit employs a cross-coupled connected PMOS transistors, it is used as a current comparator. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT) and high speed detection time. In addition, in the operation of the normal mode, the BlCS does not have dissipation of extra power, and it can be applied to the deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The area overhead of a BlCS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS standard technology.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.16 no.6
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• pp.434-440
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• 2023

This paper propose the method that measure the main system parameters for current control of a.c. motor adopting the vector control technique. The automatical method that tuning PI control gains for current control of servo motors are used frequently through the information of main system parameters, wire resistance and inductance. In this study, the techniques to measure these two system parameters through the control of 3-phase inverter are presented. These control and measuring method are implemented by measuring output phase current obtained as a results of the step current control using simple proportional feedback input. Moreover, this method use freewheeling current of inverter at special switching mode for measuring inductance. This analytic strategy is could measure and calculate the system parameters without the complex measurement algorithm and new additional measuring circuits. That is could measure the total resistance and total inductance including wiring resistance and conduction resistance of switching devices using real driving circuits to control the motors.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.10
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• pp.1216-1224
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• 1988

In this paper, it is presented element generation, addition, multiplication and division algorithm over GF ($2^m$) to calculate multiple-valued logic function. The results of addition and multiplication among these algorithms are applied to the current mode CMOS circuits with ROM structure to design of adder and multiplier on GF ($2^m$). Table-lookup and Euclid's algorithm are required the computation in large quentities when multiple-valued logic functions are developed on GF ($2^m$). On the contrary the presented operation algorithms are prefered to the conventional methods since they are processed without relation to increasing degree m in the general purpose computer. Also, the presened logic circuits are suited for the circuit design of the symmetric multiplevalued truth-tables and they can be implemented addition and multiplication on GF ($2^m$) simultaueously.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.655-658
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• 2005

Due to reduced device sizes and threshold voltages, leakage current becomes an important issue in CMOS design. In a CMOS combinational logic circuit, the leakage current in the standby state depends on the state of the inputs and thus can be minimized by applying an optimal input when the circuit is idling. In this paper, we present a New Input Vector Control algorithm, called Leakage Minimization by Input vector Control (LMIC) for minimal leakage power. This algorithm finds the minimal leakage vector and reduces leakage current up to 22.% on the average, for TSMC 0.18um process parameters. Minimal leakage vectors are very useful in reducing leakage currents in standby mode of operation.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.785-788
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• 1993

This paper presents the prototype framework for automated integration of CMOS current-mode fuzzy logic circuits using an intelligent module approach. The library of modules representing the standard fuzzy logic operators was built. These modules were finally used to synthesized sophisticated fuzzy logic units. Fuzzy unit designs were made based upon the results of a newel methodology of the current mirror-based fuzzy logic function synthesis. This methodology is actually incorporated into the presented framework. As an example, the membership function unit was synthesized, simulated, and the final layout was generated using the presented framework. Finally, the fuzzy logic controller unit (FLC) was generated using the proposed framework. Simulation as well as measurement results show unquestionable advantages of the proposed fuzzy logic function integration system over the classical design methodology with respect to the area, relative error and performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.5
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• pp.624-631
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• 2012

This paper presents a high-efficiency current mode class-D(CMCD) power amplifier for the 13.56 MHz band using a Guanella's 1:1 transmission-line transformer and filtering circuits at the output network. The second and third s are filtered out in the load network of the class-D amplifier. The implemented CMCD power amplifier exhibited a power gain of 13.4 dB and a high power-added efficiency(PAE) of 84.6 % at an output power of 44.4 dBm using the 13.56 MHz CW input signal. The second and third distortion levels were -50.3 dBc and -46.4 dBc at the same output power level, respectively.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.4
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• pp.28-34
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• 2000

In this paper, a continuous-time filter for low voltage and high frequency applications using fully-balanced current integrators is presented. As the balanced structure of integrator circuits, the designed filter has improved noise characteristics and wide dynamic range since even-order harmonics are cancelled and the input signal range is doubled. Using complementary current mirrors, bias circuits are simplified and the cutoff frequency of filters can be controlled easily by a single DC bias current. As a design example, the 3rd-order lowpass Butterworth filter with a leapfrog realization is designed. The designed fully-balanced current-mode filter is simulated and examined by SPICE using 0.65${\mu}{\textrm}{m}$ CMOS n-well process parameters. The simulation results show 50MHz cutoff frequency, 69㏈ dynamic range with 1% total harmonic distortion(THD), and 4㎽ power dissipation with a 3V supply voltage.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.6
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• pp.554-562
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• 2002

This paper presents a new sensorless control scheme using simple duty signal feedback technique in DC/DC converters. The proposed Duty Feedback Control(DFC) has the characteristics that they show the same as operation performance of current mode control by using duty feedback technique without current sensor as well as present faster dynamic response performance than conventional Sensorless Current Mode(SCM) control in case that input source is perturbed by step change or DC input source includes the harmonics. Also, the proposed control scheme has good noise immunity and simple control circuits since they have one feedback loop, and can be applied to all DC/DC converters. The concept and control principles of the proposed control scheme are explained in detail and the validity of the proposed control scheme is verified through several interesting simulated and experimental results.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.369-372
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• 2002

This paper presents a family of continuous conduction mode with constant-switching pulse width modulator controllers. Unified implementation of quasi steady state approach for various DC-DC converters topoiogies is illustrated. The property and control low for quasi-state approach will be discussed in this paper. The different procedures will be discussed in details with different results for five commonly used DC-DC converters. Both trailing and leading edge pulse width modulation are used. Leading edge modulation can some times lead to simpler control circuitry as will be demonstrated in some circuits. These controllers do not require the multiplier in the voltage feed back loop, error amplifier in the current loop and rectified line voltage sensor, which are needed by traditional control methods. Controller examples and design arc analyzed.