• 센서학회지
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• 제21권5호
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• pp.379-384
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• 2012

This paper presents the power source of wireless sensor node (WSN) using supercapacitors and a solar cell. Supercapacitors have high lifetime cycling compared to that of batteries. Supercapacitors are connected in series to achieve higher voltage and a voltage balancing circuit is required to ensure that no individual cell goes overvoltage. We employ an active balancing circuit that draws minimal current by using transistors. A diode is connected in series with each supercapacitor. A new balancing circuit that equalize the cells-voltage reduces energy consumption of supercapacitors. Voltage of operating WSN is applied 2.2-3.3V by DC/DC converter and supercapacitor voltage 2.2-5.1V. Maximum operating time of wireless sensor node is about 16 hours in full charging.

• Journal of Power Electronics
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• 제12권5호
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• pp.739-747
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• 2012

This paper applies carrier phase shifted pulse-width modulation (CPS-PWM) to transformerless modular multilevel converters (MMC) to improve the output spectrum. Because the MMC topology is characterized by the double-star connection of six legs consisting of cascaded modular chopper cells with floating capacitors, the balance control of the DC-link capacitor voltage is essential for safe operation. This paper presents a leg-balancing control strategy to achieve DC-link voltage balance under all operating conditions. This strategy based on circulating current decoupling control focused on DC-link balancing between the upper and lower legs in each phase pair by considering the six legs as three independent phase-pairs. Experiments are implemented on a 100-V 3-kVA downscaled prototype. The experimental results show that the proposed leg-balancing control is both effective and practical.

• Current Optics and Photonics
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• 제5권6호
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• pp.617-626
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• 2021

A parallel Monte Carlo photon migration algorithm for graphics processing units that implements an improved load-balancing strategy is presented. Conventional parallel Monte Carlo photon migration algorithms suffer from a computational bottleneck due to their reliance on a simple load-balancing strategy that does not take into account the different length of the mean free paths of the photons. In this paper, path-partition load balancing is proposed to eliminate this computational bottleneck based on a mathematical formula that parallelizes the photon path tracing process, which has previously been considered non-parallelizable. The performance of the proposed algorithm is tested using three-dimensional photon migration simulations of a human skin model.

• 전력전자학회논문지
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• 제27권1호
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• pp.9-17
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• 2022

The series-connected semiconductor devices structure is one way to achieve a high voltage rating. However, a problem with voltage imbalance exists in which different voltages are applied to the series-connected switches. This paper proposed a new voltage balancing technique that controls the turn-off delay time of the switch by adding one bipolar junction transistor to the gate turn-off path. The validity of the proposed method is proved through simulation and experiment. The proposed active gate driver not only enables voltage balancing across a variety of current ranges but also has a greater voltage balancing performance compared with conventional RC snubber methods.

• 전력전자학회논문지
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• 제19권4호
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• pp.332-341
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• 2014

A cascaded H-bridge multi-level STATCOM(STATic synchronous COMpensator), which is composed of many cell inverters with independent dc-sources, generates inevitably dc-side voltage unbalance among phases when it compensates unbalanced load. It comes from the difference of flowing active power in each phase when this compensator makes negative-sequence current to eliminate the unbalance of source-side current. However, this unbalance can be controlled by injecting zero-sequence current which is decoupled with grid currents, so the compensator can work well during this balancing process. Both a feedback control algorithm, which produces zero-sequence current proportional to dc-side voltage unbalance within each phase, and a feedforward control algorithm, which makes zero-sequence current directly from the compensator's negative-sequence current, were proposed. The dc-side voltage of each phase can be controlled stably by these proposed algorithms in both steady-state and transient, so the compensator can have fast response to satisfy control performance under rapid changing load. These balancing controllers were implemented and verified via simulation and experiment.

• 전자공학회논문지
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• 제52권5호
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• pp.58-65
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• 2015

본 논문에서는 신경 관련 인공 전자기기를 위한 신경 자극 집적회로를 $0.18-{\mu}m$ 표준 CMOS 반도체 공정을 이용하여 설계하였다. 제안 된 신경 자극 회로는 12.8-V 전원을 사용하면서 $10-k{\Omega}$의 부하에 최대 1 mA의 전류까지 전달이 가능하다. 표준 CMOS 공정 기술로 구현을 위해서 저전압 트랜지스터만을 이용하여 설계를 하였고, 고전압에서의 안정적인 동작을 위하여 트랜지스터 스태킹 기술을 적용하였다. 또한, 신경 자극 동작 후 전하 잔여량이 남아 있지 않도록 active charge balancing회로를 포함하였다. 제안 된 단일 채널 자극 집적회로의 경우 디지털-아날로그 변환기, 전류 출력 드라이버, 레벨 시프터, 디지털 제어 부분, 그리고 active charge balancing 회로까지 모두 포함하여 전체 칩 레이아웃 면적은 $0.13mm^2$을 차지하며, 다중 채널 방식의 신경 자극 기능의 체내 이식용 인공 전자기기 시스템에 적용을 하는데 적합하다.

• 한국정보처리학회논문지
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• 제2권3호
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• pp.288-298
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• 1995

부하 평형은 과부하 사이트의 부하종 일부를 다른 사이트로 옮김으로써 분산 처리 시스템의 성능 개선을 꾀한다. 본 논문에서는 source-initiate와 server-initiate 방 식을 모두 지원하며 극단적인 예로서 m/m/1 대기행렬(부하 비평형)과 m/m/n 대기 행렬 (완전한 부하 평형)도 모델화 할 수 있는 부하 평형 방식을 제안하였다. 이 방식은 상 태 변수를 각 사이트에 복제하고 각 복사본의 일치성을 완화한다. 그리고 오래된 스케 줄러가 통신을 하지 않고도 부하 평형을 보장할 수 있는 충분조건을 요도하였다. 이 모델을 이용하면 부하 평형의 문제가 상태의 일관성을 유지하는 문제로 바뀌게 되며 기존의 비딩 알고리즘보다 통신량이 적어지게 된다. 이벤트 트레이싱 방법으로 모의 실험하였으며 2개의 극단적인 경우 및 비딩알고리즘과 비교하였다. 그 결과 평균 응답 시간과 통신량에 있어서 비딩알고리즘보다 각각 0-35%, 40-100%의 성능향상을 보였다. 마지막으로 각 시스템 피라미터의 영향을 분석하였다.

• Journal of Power Electronics
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• 제10권4호
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• pp.351-356
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• 2010

A new current-balancing multi-channel LED driver is proposed in this paper. The conventional LED driver system consists of three cascaded power conversion stages and its driver stage has the same number of expensive boost converters as those of the LED channels. On the other hand, the proposed LED driver system consists of two cascaded power stages and its driver stage requires only passive devices instead of expensive boost converters. Nevertheless, all of the currents through multi-channel LEDs can be well balanced. Therefore, it features a smaller system size, improved efficiency, and lower cost. To confirm the validity of the proposed driver, its operation and performance are verified on a prototype for a 46" LCD TV.

• 전력전자학회논문지
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• 제27권4호
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• pp.348-355
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• 2022

A bipolar DC distribution system suffers from an imbalance in voltages when asymmetric loads are connected at the outputs. Dedicated voltage balancers are required to address the imbalance in bipolar voltage levels. However, additional components eventually increase the cost and decrease the efficiency and power density of the system. Therefore, to deal with the imbalance in output voltages without adding any extra components, this study presents a coupled inductor-based voltage balancing technique with a dual-output CLL resonant converter. The proposed coupled inductor does not require extra magnetic components to balance the output voltages because it is the result of resonant inductors of the CLL tank circuit. It can also avoid complex control schemes applied to voltage balancing. Moreover, with the proposed coupled inductor, the CLL converter acquires good features including zero voltage and zero current switching. Detailed analysis of the proposed coupled inductor is presented with different load conditions. A 3.6-kW hardware prototype was built and tested to validate the performance of the proposed coupled inductor-based voltage balancing technique.

• 전력전자학회논문지
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• 제22권3호
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• pp.256-262
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• 2017

This paper presents the control algorithm of a single-phase AC/DC/AC PWM converter for the linear compressor of a refrigerator. The AC/DC/AC converter consists of a full-bridge PWM converter for the control of the input power factor and a half-bridge PWM inverter for the control of the single-phase linear compressor. At the DC-link of this topology, two capacitors are connected in series. These DC-link voltages must be balanced for safe operation. Thus, a new control method of DC voltage balancing for the half-bridge PWM inverter is proposed. The balancing algorithm uses the Integral-Proportional controller and inserts the DC-offset current at the Proportional-Resonant current controller of the inverter to solve the DC-link unbalanced voltages between the two capacitors. The proposed algorithm can be easily implemented without much computation and additional hardware circuit. The usefulness of the proposed algorithm is verified through several experiments.