• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.9
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• pp.743-749
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• 2002

A 1.5V 70㏈ 100MHz CMOS class-AB complementary operational amplifier is presented. For obtaining the high gain and the high unity gain frequency, the input stage of the amplifier is designed with rail-to-rail complementary differential pairs which are symmetrically parallel-connected with the NMOS and the PMOS differential input pairs, and the output stage is designed to the rail-to-rail class-AB output stage including the elementary shunt stage technique. With this design technique for output stage, the load dependence of the overall open loop gain is improved and the push-pull class-AB current control can be implemented in a simple way. The designed operational amplifier operates perfectly on the complementary mode with 180$^{\circ}$ phase conversion for 1.5V supply voltage, and shows the push-pull class-AB operation. In addition, the amplifier shows the DC open loop gain of 70.4 ㏈ and the unity gain frequency of 102 MHz for $C_{L=10㎊∥}$ $R_{L=1㏁}$ Parallel loads. When the resistive load $R_{L}$ is varied from 1 ㏁ to 1 ㏀, the DC open loop gain of the amplifier decreases by only 2.2 ㏈.a$, the DC open loop gain of the amplifier decreases by only 2.2 dB.

• Journal of Power Electronics
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• v.19 no.2
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• pp.380-393
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• 2019

Traditional boost converters have difficulty realizing high efficiency and high voltage gain conversion due to 1) extremely large duty cycles, 2) high voltage and current stresses on devices, and 3) low conversion efficiency. Therefore, a function decoupling high voltage gain DC/DC converter composed of a DC transformer (DCX) and an auxiliary converter is proposed. The role of DCX is to realize fixed gain conversion with high efficiency, whereas the role of the auxiliary converter is to regulate the output voltage. In this study, different forms of combined high voltage gain converters are compared and analyzed, and a structure is selected for the function decoupling high voltage gain converter. Then, topologies and control strategies for the DCX and auxiliary converter are discussed. On the basis of the discussion, an optimal design method for circuit parameters is proposed, and design procedures for the DCX are described in detail. Finally, a 400 W experimental prototype based on the proposed optimal design method is built to verify the accuracy of the theoretical analysis. The measured maximum conversion efficiency at rated power is 95.56%.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.12
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• pp.104-109
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• 1996

A current-controlling transadmittance amplifier is proposed. It consists of a linear transadmittor and a current gain cell followed by three current mirrors. The proposed transadmittance amplifier is used to design a current-controlling frequency-dependent negative resistor (FDNR). Experimental results are presented to verify theoretical predictions. The results show close agreement between predicted behaviour and experimental performance.

• Journal of Power Electronics
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• v.11 no.1
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• pp.59-63
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• 2011

This paper presents the modeling of the sampling effect in the p-type average current mode control. The prediction of the high frequency components near half of the switching frequency in the current loop gain is given for the p-type average current mode control. By the proposed model, the prediction accuracy is improved when compared to that of conventional models. The proposed method is applied to a buck converter, and then the measurement results are analyzed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.7
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• pp.784-795
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• 2007

In this thesis, the Multi element antenna with wideband and enhanced gain characteristic is proposed to operate at both frequency range from 824 MHz to 896 11Hz for the CDMA and frequency range from 908.5 MHz to 914 MHz for the RFID band. The proposed antenna has tile size of $35{\times}15{\times}5mm^3$ in order to put it in the A model of S company and each element of the proposed antenna is folded to obtain the minimum size. To obtain the antenna with wideband and high gain characteristic, the radiator of the antenna is divided into 4 elements. As a result, bandwidth of the proposed antenna become broader and lower center frequency is appeared due to increased and lengthened current path. Moreover, the enhanced gain characteristic is verified because divided element structure that induct uniform current distribution can get increased antenna efficiency. To attain more uniform current distribution, modified structure of the feeding point that can deliver currents directly is designed. The antenna that alters the feeding structure has higher gain value. Each element is folded to increase the current paths considering the current directions to attain the miniaturization of the antenna. To measure the handset antenna, the handset case must be considered. Even though antenna is designed for predicted characteristic, the resonance frequency is shifted and antenna gain is deteriorated at predicted frequency while antenna is set in the handset case. 1.08 GHz of the resonant frequency is determined after frequency shift from 150 MHz to 200 MHz is confirmed and the maximum gain is measured as 3.1 dBi while antenna is not set in the handset. In case handset case is considered, the experimental results show that the impedance bandwidth for VSWR<2 is from 0.824 GHz to 0.936 GHz(110 MHz). This result appears that the proposed antenna can cover both CDMA and RFID band at once. The measured gain is from -3.4 dBi to -0.5 dBi and it has omni-directional pattern practically.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.12
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• pp.3638-3644
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• 2009

A CMOS multi-channel low-voltage current mode filter circuit is designed. The designed current-mode filter is based on linear cascode current-mode integrator that is newly proposed in this paper. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed linear cascode current-mode integrator achieves high current gain and unity gain frequency. The designed filter is composed with 5th Chebyshev function and converted to active version by signal flow graph method. We verified that the designed filter can be applied to three-channel basedband, bluetooth, DECT and WCDMA with 0.51MHz~7.03MHz frequency tuning range by Hspice simulation using 1.8V-$0.18{\mu}m$ CMOS technology.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.8
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• pp.1644-1650
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• 2009

An improved guarding circuit is applied to a transconductance driven-right-leg circuit to decrease common-mode current at measurement electrodes due to power-line interference. After showing conventional guarding circuit is instable due to gain-peaking when used with a transconductance DRL circuit, the effect of the proposed guarding circuit modified to suppress the gain-peaking by inserting a series resistor between shields and a shield driver was analyzed. It is shown that, besides stability, the proposed guarding circuit provides two other advantages: 1) The gain of the shield driver can be set to be unit nominally. 2) The loop gain of the transconductance DRL loop can be increased due to pole-zero canceling. The proposed circuit was implemented and the advantages were confirmed.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.12
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• pp.705-712
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• 2005

This paper deals with speed-sensorless control of an AC servo motor using Fuzzy-Tuning High Gain Observer(FTHGO). Resolver or encoder can be used to measure a rotor speed, but it has a limit to detect motor speed precisely. To solve this problem, it is studied to measure a speed of an AC servo motor without sensor. In this paper, the gain of an observer to estimate motor speed is properly set up and designed using the fuzzy control theory. It calculates the differentiation of the rotor current of the AC motor and estimates the rotor speed using it. Proposed speed sensorless control is performed using the estimated speed as the control variable. Designed FTHGO is applied to AC servo motor to verify the feasibility of the proposed observer. Feasibility of the FTHGO proposed in this paper is proven comparing the experimental results with/without the speed sensor.

• ETRI Journal
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• v.37 no.5
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• pp.972-978
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• 2015

This paper proposes an accurate tunable-gain 1/x circuit. The output voltage of the 1/x circuit is generated by using a capacitor charging time that is inversely proportional to the input voltage. The output voltage is independent of the process parameters, because the output voltage depends on the ratios of the capacitors, resistors, and current mirrors. The voltage gain of the 1/x circuit is tuned by a 10-bit digital code. The 1/x circuit was fabricated using a $0.18{\mu}m$ CMOS process. Its core area is $0.011mm^2$ ($144{\mu}m{\times}78{\mu}m$), and it consumes $278{\mu}W$ at $V_{DD}=1.8V$ and $f_{CLK}=1MHz$. Its error is within 1.7% at $V_{IN}=0.05V$ to 1 V.

• 전기의세계
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• v.18 no.5
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• pp.12-19
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• 1969

The sensitivity of transistorized d.c. amplifiers is mainly limited by drift at operating point caused by ambient temperature changes. A chopper-type transistorized amplifier is necessary to obtain a high sensitivity without recourse to drift compensation which requires the adjustment of several balancing controls. A chopper-stabilized system consisting of an electro-mechanical chopper for input and output and a high-gain a.c. amplifier is designed and analyzed. The gain of the a.c. amplifier, expressed as the ratio of voltages, is larger than 80db in the band of 50C/S - 100KC/S. The complete system gives an open-loop gain of 68db at direct current. The offset voltage is 20.mu.V referred in input and the voltage drift at the input is less than 10.mu.V/hr at 25.deg.C. This type of amplifier would be useful for the high-gain transistorized d.c. amplifier for analog computers. Also, due to the high input impedance, it is suitable for amplification of signals from wide range of source impedances.