• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.276-279
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• 2009

In this paper we demonstrate how to use optical simulation to enhance OLED performance. Using stateof-the-art p-i-n OLEDs, we validate our optical model by fitting key figures like current, power, and quantum efficiencies to the experimental results. We finally provide general design guidelines for optically optimized OLEDs.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.529-531
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• 2008

Generation system using regenerative energy like photovoltaic, fuelcell is increased, PCS technology coming into the spotlight. The efficiency of DC-DC converter as part of the PCS is very important, multi-phase boost converter has more advantage than other topology. Input current of the multi-phase boost converter is divided into two inductor current because of parallel structure of the boost converters, thus it has features of decreasing input current ripple and output voltage ripple. Also multi-phase boost converter with soft switching can decrease switching loss using ZCS and ZVS. In this paper, simulation and experiment are performed to verify operation of the proposed converter, and efficiencies of the conventional and proposed converter are compared.

• Journal of electromagnetic engineering and science
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• v.2 no.1
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• pp.5-10
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• 2002

We have analized the inverse class-F and class-F amplifiers using their waveforms. From the analytic equations derived from the analysis, we have calculated tole efficiencies, output powers, DC power dissipations, and optimum fundamental load impedances of the inverse class-F and class-F amplifiers. We also have compared them for various operation conditions, which include the same peak current, saute DC power dissipation, same fundamental RF output power, and same fundamental load impedance with different Ron(on-resistance). These analyses have clearly shown the performance limitations, advantages, and guide to the optimized design of the inverse class-F amplifiers.

• Applied Chemistry for Engineering
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• v.27 no.4
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• pp.353-357
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• 2016

Following the population growth and civilization, resulted in energy-mass consumption society, research efforts on enhancing efficiency of traditional energy sources has been investigated. Among many alternatives, thermoelectric power generation technologies are highlighted as one of solutions for high heat energy efficiencies. Currently, the research area of thermoelectric power generation has been achieved over two of ZT value, which seems to have enough competitiveness as following the development of nano-technologies, in particular, for waste heat recovery, and the development of thermoelectric materials is still ongoing to obtain higher energy efficiencies. In this review, the recent development of thermoelectric materials and module technologies categorized by different temperature regions was briefly introduced.

• Journal of Communications and Networks
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• v.12 no.2
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• pp.158-167
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• 2010

The energy efficiency of wireless infrastructure and terminals has been drawing renewed attention of late, due to their significant environmental cost. Emerging green communication paradigms such as cognitive radios, are also imposing the additional requirement of flexibility. This dual requirement of energy efficiency and flexibility poses new design challenges for implementing radio functional blocks. This paper focuses on the area vs. power trade-offs for the type of channel filters that are required in the digital frontend of a flexible, energy-efficient radio. In traditional CMOS circuits, increased area was traded for reduced dynamic power consumption. With leakage power emerging as the dominant mode of power consumption in nanoscale CMOS, these trade-offs must be revisited due to the strong correlation between area and leakage power. The current work discusses how the increased timing slacks obtained by increasing the parallelism can be exploited for overall power reduction even in nanoscale circuits. In this context the paper introduces the notion of 'area efficiency' and a metric for evaluating it. The proposed metric has also been used to compare the area efficiencies of different classes of time-shared filters.

• Current Photovoltaic Research
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• v.9 no.4
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• pp.145-159
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• 2021

Light soaking (LS) stability in polymer solar cells (PSCs) has always been a challenge to achieve due to unstable photoactive layer-electrode interface. Especially, the electron transport layer (ETL) and photoactive layer interface limits the LS stability of PSCs. Herein, we have modified the most commonly used and robust zinc oxide (ZnO) ETL-interface using an organic dye molecule and a co-adsorbent. Power conversion efficiencies have been slightly improved but when these PSCs were subjected to long term LS stability chamber, equipped with heat and humidity (45℃ and 85% relative humidity), an outstanding stability in the case of ZnO/dye+co-adsorbent ETL containing devices have been achieved. The enhanced LS stability occurred due to the suppressed interfacial defects and robust contact between the ZnO and photoactive layer. Current density as well as fill factors have been retained after LS with the modified ETL as compared to un-modified ETL, owing to their higher charge collection efficiencies which originated from higher electron mobilities. Moreover, the existence of less traps (as observed from light intensity-open circuit voltage measurements and dark currents at -2V) are also found to be one of the reasons for enhanced LS stability in the current study. We conclude that the mitigation ETL-surface traps using an organic dye with a co-adsorbent is an effective and robust approach to enhance the LS stability in PSCs.

• Journal of the Korean institute of surface engineering
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• v.30 no.2
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• pp.104-110
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• 1997

Conventional hexavlent chromium electroplating baths deposit the matal at low cathode efficiency and have poor covering and throwing power. The processs also generate hazardous wastes. To overcome many of the disadvantages of hexavalent chromium plating the use of trivalent chromium has advocted. After Yoshida, who first studied trivalent chromium plating, using ammonium sulfate and urea, there are numerous report describing the trivalent chromium electropating process using complexing agents. This study investigaten trivalent chromium plating electrolyte solutious containing formate as a complexing agent and ammouim chloride for conducting agent. The effects of composition and operating conditions on deposits and current efficiencies were investigated in trivalent chromium plating baths by analyzing the relationship pulse conditions and surface morphology The surface morphology of the deposits was observed by SEM. pulse electrolysis has been effective on obtaining a smooth with high current efficiency comparing with D.C. electrolysis in trivalent chromium solution.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.263-269
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• 2018

In this study, a selective inverter operation between a 2-level voltage source converter (VSC) and a 3-level T-type VSC (3LT VSC) is proposed to improve the efficiency of a 3LT VSC. The 3LT VSC topology, except for its neutral-point switches, has similar operations as that of the 2-level VSC. If an operation mode is changed according to efficiency, the efficiency can be improved because efficiencies of each methods are depending on current and MI (Modulation Index). The proposed method calculates the power losses of the two topologies and operates as the having lower losses. To calculate the losses, the switching and conduction losses based on the operation mode of each topology were analyzed. The controller determined the operation mode of the 2- or 3-level VSC based on the power loss calculated during every cycle. The validity of the proposed control scheme was investigated through simulation and experiments. The waveform and average efficiency of each method were compared.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.179-180
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• 2015

The task of measuring losses becomes more challenging with ever increasing efficiencies and operating frequencies in power electronics applications. Generally, the process of traditional switching loss calculation in flyback converter is very complicated. MOSFET drain-source voltage and current waveforms are needed to calculate switching loss. However, as we know in switched capacitor converter, switching loss can be easily calculated by charge and energy conservation law with known initial and final capacitor voltages. In this paper, the same method is applied to fly-back converter switching loss analysis to simplify calculation procedure.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1545-1552
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• 2013

This paper presents an implementation of embedded platform based ARM A8-cortex processor for android supporting. The development board for S5PV210 is a platform that is suitable for code development of SAMSUNG's S5PV210 32bit RICS micro controller(ARMv7) architecture for hand-held device and general applications. Embedded platform development board offers various function and high efficiencies. In addition to the high performance, the embedded platform offers low current consumption, ensuring low costs and power.