• 제목/요약/키워드: Cu-to-Cu direct bonding

검색결과 31건 처리시간 0.026초

Optimal pressure and temperature for Cu-Cu direct bonding in three-dimensional packaging of stacked integrated circuits

  • Seunghyun Yum;June Won Hyun
    • 한국표면공학회지
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    • 제56권3호
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    • pp.180-184
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    • 2023
  • Scholars have proposed wafer-level bonding and three-dimensional (3D) stacked integrated circuit (IC) and have investigated Cu-Cu bonding to overcome the limitation of Moore's law. However, information about quantitative Cu-Cu direct-bonding conditions, such as temperature, pressure, and interfacial adhesion energy, is scant. This study determines the optimal temperature and pressure for Cu-Cu bonding by varying the bonding temperature to 100, 150, 200, 250, and 350 ℃ and pressure to 2,303 and 3,087 N/cm2. Various conditions and methods for surface treatment were performed to prevent oxidation of the surface of the sample and remove organic compounds in Cu direct bonding as variables of temperature and pressure. EDX experiments were conducted to confirm chemical information on the bonding characteristics between the substrate and Cu to confirm the bonding mechanism between the substrate and Cu. In addition, after the combination with the change of temperature and pressure variables, UTM measurement was performed to investigate the bond force between the substrate and Cu, and it was confirmed that the bond force increased proportionally as the temperature and pressure increased.

Cu-Cu2O계 공융액상을 활용한 Cu/AlN 직접접합 (Direct Bonding of Cu/AlN using Cu-Cu2O Eutectic Liquid)

  • 홍준성;이정훈;오유나;조광준;류도형;오승탁;현창용
    • 한국분말재료학회지
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    • 제20권2호
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    • pp.114-119
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    • 2013
  • In the DBC (direct bonding of copper) process the oxygen partial pressure surrounding the AlN/Cu bonding pairs has been controlled by Ar gas mixed with oxygen. However, the direct bonding of Cu with sound interface and good adhesion strength is complicated process due to the difficulty in the exact control of oxygen partial pressure by using Ar gas. In this study, we have utilized the in-situ equilibrium established during the reaction of $2CuO{\rightarrow}Cu_2O$ + 1/2 $O_2$ by placing powder bed of CuO or $Cu_2O$ around the Cu/AlN bonding pair at $1065{\sim}1085^{\circ}C$. The adhesion strength was relatively better in case of using CuO powder than when $Cu_2O$ powder was used. Microstructural analysis by optical microscopy and XRD revealed that the interface of bonding pair was composed of $Cu_2O$, Cu and small amount of CuO phase. Thus, it is explained that the good adhesion between Cu and AlN is attributed to the wetting of eutectic liquid formed by reaction of Cu and $Cu_2O$.

Nano-Scale Cu Direct Bonding Technology Using Ultra-High Density, Fine Size Cu Nano-Pillar (CNP) for Exascale 2.5D/3D Integrated System

  • Lee, Kang-Wook
    • 마이크로전자및패키징학회지
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    • 제23권4호
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    • pp.69-77
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    • 2016
  • We propose nano-scale Cu direct bonding technology using ultra-high density Cu nano-pillar (CNP) with for high stacking yield exascale 2.5D/3D integration. We clarified the joining mechanism of nano-scale Cu direct bonding using CNP. Nano-scale Cu pillar easily bond with Cu electrode by re-crystallization of CNP due to the solid phase diffusion and by morphology change of CNP to minimize interfacial energy at relatively lower temperature and pressure compared to conventional micro-scale Cu direct bonding. We confirmed for the first time that 4.3 million electrodes per die are successfully connected in series with the joining yield of 100%. The joining resistance of CNP bundle with $80{\mu}m$ height is around 30 m for each pair of $10{\mu}m$ dia. electrode. Capacitance value of CNP bundle with $3{\mu}m$ length and $80{\mu}m$ height is around 0.6fF. Eye-diagram pattern shows no degradation even at 10Gbps data rate after the lamination of anisotropic conductive film.

FE-SEM Image Analysis of Junction Interface of Cu Direct Bonding for Semiconductor 3D Chip Stacking

  • Byun, Jaeduk;Hyun, June Won
    • 한국표면공학회지
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    • 제54권5호
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    • pp.207-212
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    • 2021
  • The mechanical and electrical characteristics can be improved in 3D stacked IC technology which can accomplish the ultra-high integration by stacking more semiconductor chips within the limited package area through the Cu direct bonding method minimizing the performance degradation to the bonding surface to the inorganic compound or the oxide film etc. The surface was treated in a ultrasonic washer using a diamond abrasive to remove other component substances from the prepared cast plate substrate surface. FE-SEM was used to analyze the bonding characteristics of the bonded copper substrates, and the cross section of the bonded Cu conjugates at the sintering junction temperature of 100 ℃, 150 ℃, 200 ℃, 350 ℃ and the pressure of 2303 N/cm2 and 3087 N/cm2. At 2303 N/cm2, the good bonding of copper substrate was confirmed at 350 ℃, and at the increased pressure of 3087 N/cm2, the bonding condition of Cu was confirmed at low temperature junction temperature of 200 ℃. However, the recrystallization of Cu particles was observed due to increased pressure of 3087 N/cm2 and diffusion of Cu atoms at high temperature of 350 ℃, which can lead to degradation in semiconductor manufacturing.

Cu-C$u_2$O의 공정반응에 의한 구리와 알루미나의 직접접합 (The Direct Bonding of Copper to Alumina by $Cu-Cu_2$O Eutectic Reaction)

  • 유환성;이임열
    • 한국재료학회지
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    • 제2권4호
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    • pp.241-247
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    • 1992
  • 본 연구에서는 $Cu-Cu_2$O의 공정반응에 의한 구리와 알루미나의 직접접합에 대하여 연구 하였다. $1.5{\times}10^{-1}$torr, $1015^{\circ}C$에서 산화시킨 후 $10_{-3}$torr, 107$5^{\circ}C$에서 접합시킨 시편의 접합력과 계면특성을 인장시험, SEM, EDS 및 XRD를 통하여 분석하였다. 3분 산화시켜 접합하면 우수한 접합강도를 보이며 산화시간이 이보다 짧거나 길면 결합력은 저하하였다. 과단은 알루미나 공정조직 계면에서 발생하였으며 파단후 $Al_2O_3$표면에는 Cu쪽에서 빠져나간 $Cu_2$O nodule의 존재하였는 바 접합력은 $Cu_2$O-A$l_2O_3$계면보다는 $Cu-Cu_2$O계면에 좌우됨을 보여주고 있다. 접합력은 접합시간에 따라 완만한 증가를 보였으며 CuA$l_2O_4$$CuAlO_2$의 반응생성물이 접합중 형성되었다.

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TSV 를 이용한 3 차원 적층 패키지의 본딩 공정에 의한 휨 현상 및 응력 해석 (Warpage and Stress Simulation of Bonding Process-Induced Deformation for 3D Package Using TSV Technology)

  • 이행수;김경호;좌성훈
    • 한국정밀공학회지
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    • 제29권5호
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    • pp.563-571
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    • 2012
  • In 3D integration package using TSV technology, bonding is the core technology for stacking and interconnecting the chips or wafers. During bonding process, however, warpage and high stress are introduced, and will lead to the misalignment problem between two chips being bonded and failure of the chips. In this paper, a finite element approach is used to predict the warpages and stresses during the bonding process. In particular, in-plane deformation which directly affects the bonding misalignment is closely analyzed. Three types of bonding technology, which are Sn-Ag solder bonding, Cu-Cu direct bonding and SiO2 direct bonding, are compared. Numerical analysis indicates that warpage and stress are accumulated and become larger for each bonding step. In-plane deformation is much larger than out-of-plane deformation during bonding process. Cu-Cu bonding shows the largest warpage, while SiO2 direct bonding shows the smallest warpage. For stress, Sn-Ag solder bonding shows the largest stress, while Cu-Cu bonding shows the smallest. The stress is mainly concentrated at the interface between the via hole and silicon chip or via hole and bonding area. Misalignment induced during Cu-Cu and Sn-Ag solder bonding is equal to or larger than the size of via diameter, therefore should be reduced by lowering bonding temperature and proper selection of package materials.

3차원 소자 적층을 위한 BOE 습식 식각에 따른 Cu-Cu 패턴 접합 특성 평가 (Effect of BOE Wet Etching on Interfacial Characteristics of Cu-Cu Pattern Direct Bonds for 3D-IC Integrations)

  • 박종명;김수형;김사라은경;박영배
    • Journal of Welding and Joining
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    • 제30권3호
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    • pp.26-31
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    • 2012
  • Three-dimensional integrated circuit (3D IC) technology has become increasingly important due to the demand for high system performance and functionality. We have evaluated the effect of Buffered oxide etch (BOE) on the interfacial bonding strength of Cu-Cu pattern direct bonding. X-ray photoelectron spectroscopy (XPS) analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE 2min. Two 8-inch Cu pattern wafers were bonded at $400^{\circ}C$ via the thermo-compression method. The interfacial adhesion energy of Cu-Cu bonding was quantitatively measured by the four-point bending method. After BOE 2min wet etching, the measured interfacial adhesion energies of pattern density for 0.06, 0.09, and 0.23 were $4.52J/m^2$, $5.06J/m^2$ and $3.42J/m^2$, respectively, which were lower than $5J/m^2$. Therefore, the effective removal of Cu surface oxide is critical to have reliable bonding quality of Cu pattern direct bonds.

구리-타이타늄 복합선재의 번들압출 성형특성 (Forming Characteristics for the Bundle Extrusion of Cu-Ti Bimetal Wires)

  • 이용신;김중식;윤상헌;이호용
    • 소성∙가공
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    • 제18권4호
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    • pp.342-346
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    • 2009
  • Forming characteristics for the bundle extrusion of Cu-Ti bimetal wires are investigated, which can identify the process conditions for weak mechanical bonding at the contact surface during the direct extrusion of a Cu-Ti bimetal wire bundle. Bonding mechanism between Cu and Ti is assumed as a cold pressure welding. Then, the plastic deformation at the contact zone causes mechanical bonding and a new bonding criterion for pressure welding is developed as a function of the principal stretch ratio and normal pressure at the contact surface by analyzing micro local extrusion at the contact zone. The averaged deformation behavior of Cu-Ti bimetal wire is adopted as a constitutive behavior at a material point in the finite element analysis of Cu-Ti wire bundle extrusion. Various process conditions for bundle extrusions are examined. The deformation histories at the three points, near the surface, in the middle and near the center, in the cross section of a bundle are traced and the proposed new bonding criterion is applied to predict whether the mechanical bonding at the Cu-Ti contact surface happens. Finally, a process map for the direct extrusion of Cu-Ti bimetal wire bundle is proposed.

3D 적층 IC를 위한 웨이퍼 레벨 본딩 기술 (Wafer Level Bonding Technology for 3D Stacked IC)

  • 조영학;김사라은경;김성동
    • 마이크로전자및패키징학회지
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    • 제20권1호
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    • pp.7-13
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    • 2013
  • 3D 적층 IC 개발을 위한 본딩 기술의 현황에 대해 알아보았다. 실리콘 웨이퍼를 본딩하여 적층한 후 배선 공정을 진행하는 wafer direct bonding 기술보다는 배선 및 금속 범프를 먼저 형성한 후 금속 본딩을 통해 웨이퍼를 적층하는 공정이 주로 연구되고 있다. 일반적인 Cu 열압착 본딩 방식은 높은 온도와 압력을 필요로 하기 때문에 공정온도와 압력을 낮추기 위한 연구가 많이 진행되고 있으며, 그 가운데서 Ar 빔을 조사하여 표면을 활성화 시키는 SAB 방식과 실리콘 산화층과 Cu를 동시에 본딩하는 DBI 방식이 큰 주목을 받고 있다. 국내에서는 Cu 열압착 방식을 이용한 웨이퍼 레벨 적층 기술이 현재 개발 중에 있다.

구리-타이타늄 이중미세선재 번들압출의 공정지도 개발 (Development of A Process Map for Bundle Extrusion of Cu- Ti Bimetal Wires)

  • 김중식;이용신;윤상헌
    • 한국소성가공학회:학술대회논문집
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    • 한국소성가공학회 2005년도 추계학술대회 논문집
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    • pp.393-397
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    • 2005
  • A process map has been developed, which can identify the process conditions for weak mechanical bonding at the contact surface during the direct extrusion of a Cu-Ti bimetal wire bundle. Bonding mechanism between Cu and Ti is assumed as a cold pressure welding. Then, the plastic deformation at the contact zone causes mechanical bonding and a new bonding criterion fur pressure welding is developed as a function of the principal stretch ratio and normal pressure at the contact surface by analyzing micro local extrusion at the contact zone. The averaged deformation behavior of Cu-Ti bimetal wire is adopted as a constitutive behavior at a material point in the finite element analysis of Cu-Ti wire bundle extrusion. Various process conditions for bundle extrusions are examined. The deformation histories at the three points, near the surface, in the middle and near the center, in the cross section of a bundle are traced and the proposed new bonding criterion is applied to predict whether the mechanical bonding at the Cu-Ti contact surface happens. Finally, a process map for the direct extrusion of Cu-Ti bimetal wire bundle is proposed.

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