• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.20-23
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• 2004

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing(CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. However, as the IMD layer gets thinner, micro-scratches are becoming as major defects. Chemical-Mechanical polishing(CMP) of conductors is a key process in Damascene patterning of advanced interconnect structure. The effect of alternative commercial slurries pads, and post-CMP cleaning alternatives are discuss, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. Electroplated copper deposition is a mature process from a historical point of view, but a very young process from a CMP perspective. While copper electro deposition has been used and studied for decades, its application to Cu damascene wafer processing is only now gaining complete acceptance in the semiconductor industry. The polishing mechanism of Cu-CMP process has been reported as the repeated process of passive layer formation by oxidizer and abrasion action by slurry abrasives. however it is important to understand the effect of oxidizer on copper passivation layer in order to obtain higher removal rate and non-uniformity during Cu-CMP process. In this paper, we investigated the effects of oxidizer on Cu-CMP process regarding the additional volume of oxidizer.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.1
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• pp.31-37
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• 1999

In this study, the thermal property and adhesion of the electroless-deposited Cu thin film were investigated. The multilayered structure of Cu /TaN /Si was fabricated by electroless-depositing the Cu thin layer on the TaN diffusion barrier which was deposited by MOCVD on the Si substrate. The thermal stability was investigated by measuring the resistivity as post-annealing temperature for the multilayered Cu /TaN /Si specimen which was annealed at atmospheres of $H_2$and Ar gases, respectively. The adhesion strength of Cu films was evaluated by the scratch test. The adhesion of the electroless-deposited Cu film was compared with other deposition methods of thermal evaporation and sputtering. The scratch test showed that the adhesion of electroless plated Cu film on TaN was better than that of sputtered Cu film and evaporated Cu film.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.3
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• pp.89-98
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• 2003

The electrical and mechanical properties of sputtered Cu(Mg) films are investigated for highly reliable interconnects. The roughness, adhesion, hardness and resistance to thermal stress of Cu(Mg) film annealed in vacuum at $400^{\circ}C$ for 30min were improved than those of pure Cu film. Moreover, the flat band voltage(V$_{F}$ ) shift in the Capacitance-Voltage(C-V) curve upon bias temperature stressing(BTS) was not observed and leakage currents of Cu(Mg) into $SiO_2$ were three times less than those of pure Cu. Because Mg was easy to react with oxide than Cu and Si after annealing, the Mg Oxide which formed at surface and interface served as a passivation layer as well.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.2
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• pp.37-43
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• 1999

Modules of the system that requires large capacity and high-speed information processing are implemented in the form of MCM that allows high-speed data processing, high density circuit integration and widely applied to such fields as ATM, GPS and PCS. Hence we developed the ATM switching module that is consisted of three chips and 2.48 Gbps data throughput, in the form of 10 multi-layer by Cu/Photo-BCB and 491pin PBGA which size is $48 \times 48 \textrm {mm}^2$. hnologies required for the development of the MCM includes extracting parameters for designing the substrate/package through the interconnect characterization to implement the high-speed characteristics, thermal management at the high-density MCM, and the generation of the testability that is one of the most difficult issues for developing the MCM. For the development of the ATM Switching MCM, we extracted signaling delay, via characteristics and crosstalk parameters through the interconnect characterization on the MCM-D. For the thermal management of 15.6 Watt under the high-density structure, we carried out the thermal analysis. formed 1.108 thermal vias through the substrate, and performed heat-proofing processing for the entire package so that it can keep the temperature less than $85^{\circ}C$. Lastly, in order to ensure the testability, we verified the substrate through fine pitch probing and applied the Boundary Scan Test (BST) for verifying the complex packaging/assembling processes, through which we developed an efficient and cost-effective product.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.409-409
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• 2013

최근, 집적 소자의 미세화에 따라 늘어난 배선 신호 지연 및 상호 간섭, 그리고 소비 전력의 증가는 초고집적 소자 성능 개선에 한계를 가져온다. 이에 따라 기존의 알루미늄(Al)/실리콘 절연 산화막은 구리(Cu)/저유전율 박막(low-k)으로 대체되고 있고, 이는 소자 성능 개선에 큰 영향을 미친다. 그러나 Cu는 Si과 low-k 내부로 확산이 빠르게 일어나 소자의 비저항을 높이고, 누설 전류를 일으키는 등 소자의 성능을 저하시킬 수 있는 문제점을 가지고 있다. 이러한 Cu의 확산을 막기 위하여 Ta, TaN 등과 같은 확산방지막에 대한 연구가 활발히 진행되어 왔으나, 배선 공정의 집적화와 low-k 대체에 따른 공정 및 신뢰성 문제로 인해 새로운 확산방지막의 개발이 필요하게 되었다. 이를 위해, 본 연구에서는 Cu-V 합금을 사용하여 low-k 기판 위에 확산방지막을 자가 형성 시키는 공정에 대한 연구를 진행하였다. 다양한 low-k 기판에서 열처리조건에 따른 Cu-V 합금의 특성을 확인하기 위해 4-point probe를 통한 비저항 평가와 XRD (X-ray diffraction) 분석이 이뤄졌다. 또한, TEM (transmission electron microscope)을 이용하여 $300^{\circ}C$에서 1 시간 동안 열처리를 거쳐 자가형성된 V-based interlayer가 low-k와 Cu의 계면에서 균일하게 형성된 것을 확인하였다. 형성된 V-based interlayer의 barrier 특성을 평가하고자 Cu-V합금/low-k/Si 구조와 Cu/low-k/Si 구조의 leakage current를 비교 분석하였다. Cu/low-k/Si 구조는 비교적 낮은 온도에서 leakage current가 급격히 증가하는 양상을 보였으나, Cu-V 합금/low-k/Si 구조는 $550^{\circ}C$의 thermal stress 에서도 leakage current의 변화가 거의 없었다. 이러한 결과를 바탕으로 열처리를 통해 자가형성된 V-based interlayer의 Cu/low-k 간 확산방지막으로서 가능성을 검증하였다.

• Journal of Welding and Joining
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• v.32 no.3
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• pp.53-59
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• 2014

The mechanical stability of solder joints in electronic devices with Sn-Ag-Cu is a continuous issue since the material was applied to the industry. Various shock test methods were developed and standardized tests are used in the industry worldwide. Although it is applied for several years, the detailed mechanism of the shock induced failure mechanism is still under investigation. In this study, the effect of external temperature was observed on large Flip-chip BGA components. The weight and size of the large package produced a high strain region near the corner of the component and thus show full fracture at around 200G level shock input. The shock performance at elevated temperature, at $100^{\circ}C$ showed degradation based on board pad designs. The failure mode and potential failure mechanisms are discussed.

• Journal of the Korean institute of surface engineering
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• v.47 no.4
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• pp.162-167
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• 2014

The primary purpose of this research is to investigate how much the complexing agent in electroless Cu electrolytes will affect adhesion strength between copper film and Ta diffusion barrier for Cu interconnect of semiconductor. The adhesion strength using rochelle's salt as complexing agent was higher than the case of using EDTA-4Na. Effect of complexing agent on adhesion strength and electrical resistivity was studied in crystal structural point of view.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.5
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• pp.397-401
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• 2008

Most of the topic in PCB industry was about increasing the volume of product for the development of electronics in numerous industrial application area. However, it has been emerged that yield improvement quality manufacturing via detecting any suspicious process in order to minimize the scrapped product and material waste. In addition, recently, restriction of hazardous substances (RoHS) claims that electronic manufacturing environment should reduce the harmful chemicals usage, thus the importance of monitoring copper etchant and detecting any mis-processing is crucial for electronics manufacturing. In this paper, we have developed real-time chemical monitoring system using RGB sensor, which is simpler but more accurate method than commercially utilized oxidation reduction potential (ORP) technique. The developed Cu etchant monitoring system can further be utilized for copper interconnect process in future nano-semiconductor process.

• Journal of the Korean Solar Energy Society
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• v.38 no.1
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• pp.45-55
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• 2018

Environmentally benign lead-free solder coated ribbon (e. g. SnCu, SnZn, SnBi${\cdots}$) has been intensively studied to interconnect cells without lead mixed ribbon (e. g. SnPb) in the crystalline silicon(c-Si) photovoltaic modules. However, high melting point (> $200^{\circ}C$) of non-lead based solder provokes increased thermo-mechanical stress during its soldering process, which causes early degradation of PV module with it. Hence, we proposed low-temperature conductive paste (CP) based tabbing method for lead-free ribbon. Modules, interconnected by the lead-free solder (SnCu) employing CP approach, exhibits similar output without increased resistivity losses at initial condition, in comparison with traditional high temperature soldering method. Moreover, 400 cycles (2,000 hour) of thermal cycle test reveals that the module integrated by CP approach withstands thermo-mechanical stress. Furthermore, this approach guarantees strong mechanical adhesion (peel strength of ~ 2 N) between cell and lead-free ribbons. Therefore, the CP based tabbing process for lead free ribbons enables to interconnect cells in c-Si PV module, without deteriorating its performance.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.3
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• pp.31-36
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• 2000

We developed embedded inductors in MCM-D substrate for RF applications. The increasing demand for high density packaging was the driving forces to the development of MCM-D technology. Most of these development efforts have been focused on high performance digital circuits. However, recently there is a great need fur mixed mode circuits with a combination of digital, analog and microwave devices. Mixed mode modules often have a large number of passive components that are connected to a small number of active devices. Integration of passive components into the high density MCM substrate becomes desirable to further reduce cost, size, and weight of electronic systems while improving their performance and reliability. The proposed MCM-D substrate was based on Cu/photosensitive BCB multilayer and Ti/Cu is used to form the interconnect layer. Seed metal was formed with 1000 $\AA$ Ti/3000 $\AA$ Cu by sputtering method and main metal was formed with 3 $\mu\textrm{m}$ Cu by electrical plating method. The multi-turn sprial inductors were designed in coplanar fashion. This paper describe the manufacturing process of integrated inductors in MCM-D substrate and the results of electrical performance test.