• Title/Summary/Keyword: Computer system architecture

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A Study on the Development of the Expert System for the Architectural Programming in General Hospital (종합병원의 건축 프로그래밍을 위한 전문가 시스템 개발에 관한 연구)

  • Mun, Yun-Gi;Lee, Nak-Woon
    • Journal of The Korea Institute of Healthcare Architecture
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    • v.3 no.5
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    • pp.41-52
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    • 1997
  • The purpose of this thesis is to develop the new method of the expert system as a new approach of the architectural programming in general hospital. Theoretical and field investigations have been made for this study, and finally, the computer pro gram for the architectural programming of general hospital was established. The architectural programming of general hospital is more complex than any other types of buildings and has been changed rapidly according to the social, cultural and environmental factors. Hence, a new approach method is necessary for corresponding to the complexity and these factors. Therefore, the computer should be used as a tool in order to operate more logical and systematic programming.

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Reliable Overlay Multicast with Loosely Coupled TCP Connections

  • Kwon, Gu-In;Byers, John
    • Journal of Communications and Networks
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    • v.11 no.3
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    • pp.306-317
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    • 2009
  • We consider the problem of architecting a reliable content delivery system across an overlay network using TCP connections as the transport primitive. We first argue that natural designs based on store-and-forward principles that tightly couple TCP connections at intermediate end-systems impose fundamental performance limitations, such as dragging down all transfer rates in the system to the rate of the slowest receiver. In contrast, the ROMA architecture we propose incorporates the use of loosely coupled TCP connections together with fast forward error correction techniques to deliver a scalable solution that better accommodates a set of heterogeneous receivers. The methods we develop establish chains of TCP connections, whose expected performance we analyze through equation-based methods. We validate our analytical findings and evaluate the performance of our ROMA architecture using a prototype implementation via extensive Internet experimentation across the PlanetLab distributed testbed.

Real-Time Control System

  • Gharbi, Atef
    • International Journal of Computer Science & Network Security
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    • v.21 no.4
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    • pp.19-27
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    • 2021
  • Tasks scheduling have been gaining attention in both industry and research. The scheduling that ensures independent task execution is critical in real-time systems. While task scheduling has gained a lot of attention in recent years, there have been few works that have been implemented into real-time architecture. The efficiency of the classical scheduling strategy in real-time systems, in particular, is still understudied. To reduce total waiting time, we apply three scheduling approaches in this paper: First In/First Out (FIFO), Shortest Execution Time (SET), and Shortest-Longest Execution Time (SLET). Experimental results have demonstrated the efficacy of the SLET in comparison with the others in most cases in a wide range of configurations.

A Novel Architecture for Real-time Automated Intrusion Detection Fingerprinting using Honeypot

  • Siddiqui, Muhammad Shoaib;Hong, Choong-Seon
    • Proceedings of the Korea Information Processing Society Conference
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    • 2007.05a
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    • pp.1093-1095
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    • 2007
  • As the networking and data communication technology is making progress, there has been an augmented concern about the security. Intrusion Detection and Prevention Systems have long being providing a reliable layer in the field of Network Security. Intrusion Detection System works on analyzing the traffic and finding a known intrusion or attack pattern in that traffic. But as the new technology provides betterment for the world of the Internet; it also provides new and efficient ways for hacker to intrude in the system. Hence, these patterns on which IDS & IPS work need to be updated. For detecting the power and knowledge of attackers we sometimes make use of Honey-pots. In this paper, we propose a Honey-pot architecture that automatically updates the Intrusion's Signature Knowledge Base of the IDS in a Network.

Studying on a Medical Expert System Architecture and Process based on Drools (Drools 기반의 메디컬 Expert 시스템 아키텍처와 프로세스 연구)

  • Jang, Wonyong;Choi, Yuna;Yang, Seongsoo;Choi, Eunmi
    • Proceedings of the Korea Information Processing Society Conference
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    • 2017.11a
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    • pp.827-830
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    • 2017
  • 본 논문은 병원에서 환자가 내원할 때 의사에게 환자 진단과 처방을 지원을 할 수 있는 메디컬 시스템에 대한 연구를 하였다. 메디컬 프로세스를 고려한 환자의 증상에 대한 파악과 진단, 처방에 이르기까지의 지원할 수 있는 병원의 증상 진단 지원 Expert System을 연구한다. 본 Expert System을 구축하기 위하여 오픈소스 프로젝트인 Drools를 사용하였다. 본 시스템은 시스템 운영 중, 병원에서 사용하는 증상 진단 지원 rule들을 용이하게 추가하며 사용할 수 있도록 하며, 사용한 Drools의 호환성 해결과 다양한 기능성을 사용하기 위해 Maven을 이용한 증상 진단 지원 Expert System을 설계하였다. 이 시스템의 전체 구성 시스템 아키텍처뿐만 아니라, 환자가 증상을 입력한 이후의 환자 증상, 진단, 처방에 이르기까지의 병원에서 일어나는 프로세스를 구현 및 연구를 하였다.

Design & Implementation of Enhanced Groupware Messenger

  • Park, HyungSoo;Kim, HoonKi;Na, WooJong
    • Journal of the Korea Society of Computer and Information
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    • v.23 no.4
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    • pp.81-88
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    • 2018
  • In this paper, we present some problems with the Groupware Messenger functionality based on dot net 2.0 and implement a new design structure to solve them. They include memory leakage, slow processing, and client window memory crash. These problems resulted in the inconvenience of using instant messaging and the inefficient handling of office tasks. Therefore, in this paper, instant messaging functionality is implemented according to a new design architecture. The new system upgrades dot net 4.5 for clients and deploys the new features based on MQTT for the messenger server. We verify that the memory leak problem and client window memory crash issues have been eliminated on the system with the new messenger functionality. We measure the amount of time it takes to bind data to a set of messages and evaluate the performance, compared to a given system. Through this comparative evaluation, we can see that the new system is more reliable and performing.

병렬분산 환경에서의 DEVS형식론의 시뮬레이션

  • Seong, Yeong-Rak;Jung, Sung-Hun;Kon, Tag-Gon;Park, Kyu-Ho-
    • Proceedings of the Korea Society for Simulation Conference
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    • 1992.10a
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    • pp.5-5
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    • 1992
  • The DEVS(discrete event system specification) formalism describes a discrete event system in a hierarchical, modular form. DEVSIM++ is C++ based general purpose DEVS abstract simulator which can simulate systems to be modeled by the DEVS formalism in a sequential environment. We implement P-DEVSIM++ which is a parallel version of DEVSIM++. In P-DEVSIM++, the external and internal event of models can be processed in parallel. To process in parallel, we introduce a hierarchical distributed simulation technique and some optimistic distributed simulation techniques. But in our algorithm, the rollback of a model is localized itself in contrast to the Time Warp approach. To evaluate its performance, we simulate a single bus multiprocessor architecture system with an external common memory. Simulation result shows that significant speedup is made possible with our algorithm in a parallel environment.

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A New XMPP/SIP Presence Service System by Multiple Servers Architecture (다중 서버 구조에 의한 새로운 XMPP/SIP 프레즌스 서비스 시스템)

  • Lee, Ky-Soo;Jang, Choonseo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.5
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    • pp.1144-1150
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    • 2015
  • Presence information provides various informations about users such as on-line status, current location, network connection method and connection address, and there are two kinds of presence information, SIP(Session Initiation Protocol) based presence information and XMPP(Extensible Massaging and Presence Protocol) based presence information. In this paper, a multiple server architecture that can handle these two kinds of presence information has been proposed. In this architecture, severs are added dynamically according to number of users to provide system scalability, and load of each server can be effectively controlled. In this system, a new XMPP stanza architecture and presence information data format are designed for load control. Furthermore message exchanging procedures between servers and users for dynamic server control has been also suggested. The performance of the proposed system has been analysed by simulation.

Smart Grid Cooperative Communication with Smart Relay

  • Ahmed, Mohammad Helal Uddin;Alam, Md. Golam Rabiul;Kamal, Rossi;Hong, Choong Seon;Lee, Sungwon
    • Journal of Communications and Networks
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    • v.14 no.6
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    • pp.640-652
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    • 2012
  • Many studies have investigated the smart grid architecture and communication models in the past few years. However, the communication model and architecture for a smart grid still remain unclear. Today's electric power distribution is very complex and maladapted because of the lack of efficient and cost-effective energy generation, distribution, and consumption management systems. A wireless smart grid communication system can play an important role in achieving these goals. In this paper, we describe a smart grid communication architecture in which we merge customers and distributors into a single domain. In the proposed architecture, all the home area networks, neighborhood area networks, and local electrical equipment form a local wireless mesh network (LWMN). Each device or meter can act as a source, router, or relay. The data generated in any node (device/meter) reaches the data collector via other nodes. The data collector transmits this data via the access point of a wide area network (WAN). Finally, data is transferred to the service provider or to the control center of the smart grid. We propose a wireless cooperative communication model for the LWMN.We deploy a limited number of smart relays to improve the performance of the network. A novel relay selection mechanism is also proposed to reduce the relay selection overhead. Simulation results show that our cooperative smart grid (coopSG) communication model improves the end-to-end packet delivery latency, throughput, and energy efficiency over both the Wang et al. and Niyato et al. models.

A Study on 16/32 bit Bi-length Instruction Set Computer 32 bit Micro Processor (16/32비트 길이 명령어를 갖는 32비트 마이크로 프로세서에 관한 연구)

  • Cho, Gyoung-Youn
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.2
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    • pp.520-528
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    • 2000
  • he speed of microprocessor getting faster, the data transfer width between the microprocessor and the memory becomes a critical part to limit the system performance. So the study of the computer architecture with the high code density is cmerged. In this paper, a tentative Bi-Length Instruction Set Computer(BISC) that consists of 16 bit and 32 bit length instructions is proposed as the high code density 32 bit microprocessor architecture. The 32 bit BISC has 16 general purpose registers and two kinds of instructions due to the length of offset and the size of immediate operand. The proposed 32 bit BISC is implemented by FPGA, and all of its functions are tested and verified at 1.8432MHz. And the cross assembler, the cross C/C++ compiler and the instruction simulator of the 32 bit BISC are designed and verified. This paper also proves that the code density of 32 bit BISC is much higher than the one of traditional architecture, it accounts for 130~220% of RISC and 130~140% of CISC. As a consequence, the BISC is suitable for the next generation computer architecture because it needs less data transfer width. And its small memory requirement offers that it could be useful for the embedded microprocessor.

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