• Title/Summary/Keyword: Computer operation

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Formal Analysis of Distributed Shared Memory Algorithms

  • Muhammad Atif;Muhammad Adnan Hashmi;Mudassar Naseer;Ahmad Salman Khan
    • International Journal of Computer Science & Network Security
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    • v.24 no.4
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    • pp.192-196
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    • 2024
  • The memory coherence problem occurs while mapping shared virtual memory in a loosely coupled multiprocessors setup. Memory is considered coherent if a read operation provides same data written in the last write operation. The problem is addressed in the literature using different algorithms. The big question is on the correctness of such a distributed algorithm. Formal verification is the principal term for a group of techniques that routinely use an analysis that is established on mathematical transformations to conclude the rightness of hardware or software behavior in divergence to dynamic verification techniques. This paper uses UPPAAL model checker to model the dynamic distributed algorithm for shared virtual memory given by K.Li and P.Hudak. We analyse the mechanism to keep the coherence of memory in every read and write operation by using a dynamic distributed algorithm. Our results show that the dynamic distributed algorithm for shared virtual memory partially fulfils its functional requirements.

Comparison of Efficiency According to the Two Control Method of the Wireless Charging System Considering Wired/Wireless Integrated Charging System for EV (전기자동차용 유·무선 통합 충전을 고려한 무선 충전 시스템의 두 가지 제어 방식에 따른 효율 비교·분석)

  • Heo, Hun;Lee, Ju-A;Sim, Dong-Hyun;Son, Won-Jin;Lee, Byoung-Kuk
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.3
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    • pp.228-236
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    • 2022
  • The charging methods of electric vehicles are divided into wired charging and wireless charging. Restrictions on the use of charging infrastructure for wireless charging vehicles currently exist because most charging infrastructure uses the wired charging method. Thus, wired and wireless integrated charging system has been studied. In this system, a wireless charging system especially requires a control method for high-efficiency operation in consideration of a change in a coupling coefficient. Therefore, this paper introduces two control methods for the high-efficiency operation of wireless charging that can be applied to wired and wireless integrated charging systems. In addition, loss analysis is performed through PSIM simulation to select a more advantageous method for high-efficiency operation among the two control methods. To verify the simulation-based loss analysis result, the two control methods are applied to the actual wireless charging system, and the efficiency is compared through the experiments Based on the experimental results, a control method suitable for high-efficiency operation of the wireless charging method is selected.

Integrating Operation of Dispersed Generation to Automation Distribution Center for Distribution Network Reconfiguration

  • Park, Joon-Ho;Kim, Jae-Chul;Moon, Seung-Il
    • KIEE International Transactions on Power Engineering
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    • v.2A no.3
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    • pp.102-108
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    • 2002
  • Due to the many attractive aspects of DG in the future power distribution system, distribution automation will be a center hub of integration of the distribution system and resources to satisfy the various needs of customers in a competitive and deregulated environment. In this paper, operation strategies are presented which use network reconfiguration of the automated distribution systems with DG as a real-time operation tool for loss reduction and service restoration from the view of distribution operation. The algorithms and operation strategies of an automated distribution system with DG are introduced to achieve the positive effects of DG in distribution systems. A simple case study shows the effectiveness of the proposed operation strategies.

DC Bus Voltage Regulation With Six-Step Operation in Maritime DC Power System (식스 스텝 운전을 이용한 선박용 DC 전력 시스템의 직류단 전압 제어)

  • Yun, Jonghun;Son, Young-Kwang;Sul, Seung-Ki
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.4
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    • pp.263-270
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    • 2021
  • Active AC/DC converters with PWM operation are utilized to regulate rectified DC bus voltage of a permanent magnet synchronous generator in the maritime DC power system. A DC bus voltage regulation strategy that exploits the six-step operation is proposed in this study. Compared with that of the PWM operation, switching loss of the converter can be significantly reduced under the six-step operation. Moreover, conduction loss can also be reduced due to the high modulation index and reduced flux-weakening current of the six-step operation. A controller is used for the proposed DC bus voltage regulation strategy to verify its validity with the simulation and experimental setup. The simulation and the experimental test results showed that the converter loss reduces to a maximum of 70% and 19%, respectively.

Data Hiding in Halftone Images by XOR Block-Wise Operation with Difference Minimization

  • Yang, Ching-Nung;Ye, Guo-Cin;Kim, Cheon-Shik
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.5 no.2
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    • pp.457-476
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    • 2011
  • This paper presents an improved XOR-based Data Hiding Scheme (XDHS) to hide a halftone image in more than two halftone stego images. The hamming weight and hamming distance is a very important parameter affecting the quality of a halftone image. For this reason, we proposed a method that involves minimizing the hamming weights and hamming distances between the stego image and cover image in $2{\times}2$-pixel grids. Moreover, our XDHS adopts a block-wise operation to improve the quality of a halftone image and stego images. Furthermore, our scheme improves security by using a block-wise operation with A-patterns and B-patterns. Our XDHS method achieves a high quality with good security compared to the prior arts. An experiment verified the superiority of our XDHS compared with previous methods.

Control Method for Reducing Circulating Current in Parallel Operation of DC Distribution System for Building Applications (빌딩용 DC 배전 시스템의 병렬 운전 시 발생하는 순환전류를 저감시키기 위한 제어 기법)

  • Kim, Hack-Seong;Shin, Soo-Cheol;Lee, Hee-Jun;Jung, Chul-Ho;Han, Dong-Woo;Won, Chung-Yuen
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.3
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    • pp.256-262
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    • 2013
  • In the large system such DC distribution for building, the method that a number of modules converters operation in parallel is commonly used. When parallel operation, circulating current is directly related to the loss of the entire system. Accordingly, each module to share the same current is the most important for the safety of the power system. In this paper, control method for reducing circulating current in parallel operation is proposed. furthermore response and operation of steady-state with parallel system was verified by simulation and experiment results.

Removing Baseline Drift in ECG Signal using Morphology-pair Operation and median value (Morphology-pair 연산과 중간 값을 이용한 심전도 신호의 기저선 변동 잡음 제거)

  • Park, Kil-Houm;Kim, Jeong-Hong
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.8
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    • pp.107-117
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    • 2014
  • This paper proposed the method of removing baseline drift by eliminating local maxima such as P, R, T-wave signal region and local minima Q, S-wave signal region. We applied morphology-pair operations improved from morphology operation to the ECG signal. To eliminate overshoot in the result of morphology-pair operation, we apply median value operation to the result of morphology-pair operation. We use MIT/BIH database to estimate the proposed algorithm. Experiment result show that proposed algorithm removing baseline drift effectively without orignal ECG signal distortion.

Quantitative Analysis on Voltage Schemes for Reliable Operations of a Floating Gate Type Double Gate Nonvolatile Memory Cell

  • Cho, Seong-Jae;Park, Il-Han;Kim, Tae-Hun;Lee, Jung-Hoon;Lee, Jong-Duk;Shin, Hyung-Cheol;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.3
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    • pp.195-203
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    • 2005
  • Recently, a novel multi-bit nonvolatile memory based on double gate (DG) MOSFET is proposed to overcome the short channel effects and to increase the memory density. We need more complex voltage schemes for DG MOSFET devices. In view of peripheral circuits driving memory cells, one should consider various voltage sources used for several operations. It is one of the key issues to minimize the number of voltage sources. This criterion needs more caution in considering a DG nonvolatile memory cell that inevitably requires more number of events for voltage sources. Therefore figuring out the permissible range of operating bias should be preceded for reliable operation. We found that reliable operation largely depends on the depletion conditions of the silicon channel according to charge amount stored in the floating gates and the negative control gate voltages applied for read operation. We used Silvaco Atlas, a 2D numerical simulation tool as the device simulator.

Fast Generation Methods for Computer-Generated Hologram Using a Modified Recursive Addition Algorithm

  • Choi, Hyun-Jun
    • Journal of information and communication convergence engineering
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    • v.11 no.4
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    • pp.282-287
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    • 2013
  • A real-time digital holographic display is the core technology for the next-generation 3DTV. Holographic display requires a considerably large amount of calculation. If generating a large number of digital holograms is intended, the amount of calculation and the time required increase exponentially. This is a significant obstacle in a real-time hologram service. This paper proposes an algorithm that increases the speed of generating a Fresnel hologram by using a recursive addition operation covering the entire coordinate array of a digital hologram. The 3D object designed to calculate the digital hologram uses a depth-map image produced by computer graphics. The proposed algorithm is a technique that performs the computer-generated holography (CGH) operation with only recursive addition of all of the hologram's coordinates by analyzing the regularity between the 3D object and the digital hologram coordinates. The experimental results show that the proposed algorithm increases the operation speed by 70% over the technique using the conventional CGH equation and by more than 30% over the previously proposed recursive technique.

Time Complexity Measurement on CUDA-based GPU Parallel Architecture of Morphology Operation

  • Izmantoko, Yonny S.;Choi, Heung-Kook
    • Journal of Korea Multimedia Society
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    • v.16 no.4
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    • pp.444-452
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    • 2013
  • Operation time of a function or procedure is a thing that always needs to be optimized. Parallelizing the operation is the general method to reduce the operation time of the function. One of the most powerful parallelizing methods is using GPU. In image processing field, one of the most commonly used operations is morphology operation. Three types of morphology operations kernel, na$\ddot{i}$ve, global and shared, are presented in this paper. All kernels are made using CUDA and work parallel on GPU. Four morphology operations (erosion, dilation, opening, and closing) using square structuring element are tested on MRI images with different size to measure the speedup of the GPU implementation over CPU implementation. The results show that the speedup of dilation is similar for all kernels. However, on erosion, opening, and closing, shared kernel works faster than other kernels.