• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2471-2474
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• 2003

The modified discrete cosine transform (MDCT) and its inverse transform (IMDCT) are employed in subband/transform coding schemes as the analysis/synthesis filter bank based on time domain aliasing cancellation (TDAC). And they are the most computational intensive operations in layer III of the MPEG audio coding standard. In this paper, we propose a new efficient algorithm for the MDCT/IMDCT computation. It is based on the MDCT/IMDCT computation algorithm using the discrete cosine transforms (DCTs), and it employs two discrete cosine transform of type II(DCT-II) to compute the MDCT/IMDCT. In addition to, it takes advantage of ability in calculating the MDCT/IMDCT computation, where the length of a data block is divisible by 4. The proposed algorithm in this paper requires less calculation complexity than the existing methods. Also, it can be implemented by the parallel structure,, and its structure is particularly suitable for VLSI realization.

• Journal of the Korean Society for Precision Engineering
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• v.16 no.4 s.97
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• pp.26-36
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• 1999

A general procedure for determining the optimum location of suspension hard points with respect to kinematic design parametes is presented. Suspensions are modeled as connection of rigid bodies by ideal kinematic joints. Constraint equations of the kinematic joints are expressed in terms of the generalized coordinates and hard points. By directly differentiating the constraint equations with respect to the hard points, kinematic sencitivity equations are obtained. In order to cope with algebraic complexity associated with the differentiation process, a symbolic computation technique is used. A performance index is defined in terms of static design parameters such as camber, caster, toe, ect.. Gradient of the performance index can be analytically computed from the kinematic sensitivity equations. Optimization results show the effectiveness and validity of the procedure, which is applicable to any type of suspension if its kinematic configurations are given.

• Journal of Korea Multimedia Society
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• v.9 no.12
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• pp.1607-1616
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• 2006

The growing market of multimedia and digital signal processing requires significant data-path portions of SoCs. However, the common models for verification are not suitable for SoCs. A novel model--WGL (Weighted Generalized List) is proposed, which is based on the general-list decomposition of polynomials, with three different weights and manipulation rules introduced to effect node sharing and the canonicity. Timing parameters and operations on them are also considered. Examples show the word-level WGL is the only model to linearly represent the common word-level functions and the bit-level WGL is especially suitable for arithmetic intensive circuits. The model is proved to be a uniform and efficient model for both bit-level and word-level functions. Then Based on the WGL model, a backward-construction logic-verification approach is presented, which reduces time and space complexity for multipliers to polynomial complexity(time complexity is less than $O(n^{3.6})$ and space complexity is less than $O(n^{1.5})$) without hierarchical partitioning. Finally, a construction methodology of word-level polynomials is also presented in order to implement complex high-level verification, which combines order computation and coefficient solving, and adopts an efficient backward approach. The construction complexity is much less than the existing ones, e.g. the construction time for multipliers grows at the power of less than 1.6 in the size of the input word without increasing the maximal space required. The WGL model and the verification methods based on WGL show their theoretical and applicable significance in SoC design.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.3C
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• pp.258-263
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• 2006

Each pixel in a matching block does not equally contribute to block matching and the matching error is greatly affected by image complexity. On the basis of the facts, this paper proposes a fast motion estimation algorithm using some sub-blocks selected by the image complexity. The proposed algorithm divides a matching block into 16 sub-blocks, computes the image complexity in every sub-block, executes partial block matching using some sub-blocks with large complexity, and detects a motion vector. The simulation results show that the proposed algorithm brings about negligible image degradation, but can reduce a large amount of computation in comparison with conventional algorithms.

• The Journal of the Acoustical Society of Korea
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• v.28 no.3E
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• pp.93-98
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• 2009

In this paper, we propose a new VSS-NLMS algorithm through a simple modification of the conventional NLMS algorithm, which leads to a low complexity algorithm with enhanced performance. The step size of the proposed algorithm becomes smaller as the error signal is getting orthogonal to the input vector. We also show that the proposed algorithm is an approximated normalized version of the KZ-algorithm and requires less computation than the KZ-algorithm. We carried out a performance comparison of the proposed algorithm with the conventional NLMS and other VSS algorithms using an adaptive channel equalization model. It is shown that the proposed algorithm presents good convergence characteristics under both stationary and non-stationary environments despites its low complexity.

• Journal of computational fluids engineering
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• v.11 no.3 s.34
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• pp.1-7
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• 2006

Euler and Navier-Stokes flow analyses for helicopter rotor in hover were performed as low and high fidelity analysis models respectively for the future multidisciplinary design optimization(MDO). These design-oriented analyses possess several attributes such as variable complexity, sensitivity-computation capability and modularity which analysis models involved in MDO are recommended to provide with. To realize PC-based analyses for both fidelity models, reduction of flow domain was made by appling farfield boundary condition based on 3-dimensional point sink with simple momentum theory and also periodic boundary condition in the azimuthal direction. Correlations of thrust, torque and their sensitivities between low and high complexity models were tried to evaluate the applicability of these analysis models in MDO process. It was found that the low-fidelity Euler analysis model predicted inaccurate sensitivity derivatives at relatively high angle of attack.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2013.06a
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• pp.173-175
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• 2013

In this paper, we propose a fast and low-complexity Motion Estimation (ME) algorithm for High Efficiency Video Coding (HEVC). Motion estimation occupies 77~81% of the amount of computation in HEVC. After all, the main key of codec implementation is to find a fast and low-complexity motion estimation algorithm and architecture. The proposed algorithm uses only 1% of the amount of operations compared to full search algorithm while maintaining compression performance with slight loss of 0.6% (BDBR).

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.10
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• pp.168-176
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• 1996

This paper presetns a 2-D DCT architecture adopting accurac y compensator for reducing the hardware complexity and increasing processing speed in VL\ulcornerSI implementation. In the application fields such as moving pictures experts group (MPEG) and joint photographic experts group (JPEG), 2-D DCT processor must be implemented precisely enough to meet the accuracy specifications of the ITU-T H.261. Almost all of 2-D DCT processors have been implemented using many multiplications and accumulations of matrices and vectors. The number of multiplications and accumulations seriously influence on comlexity and speed of 20D DCT processor. In 2-D DCT with fixed-point calculations, the computation bit width must be sufficiently large for the above accuracy specifications. It makes the reduction of hardware complexity hard. This paper proposes the accuracy compensator which compensates the accuracy of the finite word length calculation. 2-D DCT processor with the proposed accuracy compensator shows fairly reduced hardware complexity and improved processing speed.

• Journal of applied mathematics & informatics
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• v.20 no.1_2
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• pp.637-645
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• 2006

An adaptive algorithm for reducing the hardware complexity is presented. This paper proposes a simplified LMS algorithm for the adaptive system and analyzes its convergence characteristics mathematically. An objective of the proposed algorithm is to reduce the hardware complexity. In order to test the performances, it is applied to the echo canceller, and a program is described. The results from simulations show that the echo canceller adopting the proposed algorithm achieves almost the same performances as one adopting the NLMS algorithm. If an echo canceller is implemented with this algorithm, its computation quantities are reduced to the half as many as the one that is implemented with the LMS algorithm, without so much degradation of performances.

• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.20-22
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• 2007

The H.264/AVC standard developed by the joint Video Team (JVT) provides better coding efficiency than previous standards. The new emerging H.264/AVC employs variable block size motion estimation using multiple reference frame with 1/4-pel MV(Motion Vector) accuracy. These techniques are a important feature to accomplish higher coding efficiency. However, these techniques are increased overall computational complexity. To overcome this problem, this paper proposes advanced fast mode decision suited for variable block size by classifying inter mode based on Rate Distortion Optimization(RDO) technique. Proposed algorithm is going to use to implement H/W structure for fast mode decision. The experimental results shows that the proposed algorithm provides significant reduction computational complexity without any noticeable coding loss and additional computation. Entire computational complexity is decreased about 30%.