• 한국정보전자통신기술학회논문지
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• 제13권6호
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• pp.568-574
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• 2020

본 논문에서는 영상처리에 사용되는 Canny edge 검출 알고리즘 중 가장 높은 연산 복잡도를 가진 제곱근 연산 횟수를 감소시키는 방법을 제안한다. 제안하는 방법은 기울기 벡터 연산 과정에 사용되는 제곱근 연산을 이용할 때 일부 픽셀에 특정한 규칙을 사용해 홀을 만들어 제곱근 연산을 직접 하지 않고 주변 픽셀들의 연속성을 이용하여 기울기 벡터를 계산하여 연산 횟수를 감소시킨다. 다양한 테스트 이미지를 이용해 실험한 결과 홀이 1개인 경우 약 97%, 홀을 증가시키면 각각 약 94%, 90%, 88%의 일치율을 보였고, 홀이 1개인 경우에는 0.2ms의 연산시간이 감소되었고, 홀을 증가시키면 각각 약 0.398ms 0.6ms, 0.8ms의 연산시간이 감소되었다. 이를 바탕으로 hole이 2개인 경우 높은 정확도와 연산 수 절감을 통해 저전력 임베디드 비전 시스템을 구현할 수 있을 것으로 기대한다.

• 대한전자공학회논문지SP
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• 제48권1호
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• pp.64-70
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• 2011

본 논문은 H.264/AVC 비디오 코덱의 부화소 움직임 추정 연산을 효율적으로 줄일 수 있는 화소 재구성 알고리즘을 제안한다. 부화소 움직임 추정 연산은 보다 정확한 움직임 벡터를 찾을 수 있어 비디오 코덱에 널리 사용되지만, 추가적인 보간 및 탐색 연산으로 인해 부호화가의 연산량을 증가시키는 문제점이 있다. 본 논문은 화소 재구성 알고리즘을 이용한 부화소 움직임 추정기를 제안 하였다. 일반적인 부화소 움직임 추정기는 보간 시 같은 화소를 중복하여 보간한다. 이러한 중복 보간은 연산량을 증가 시키는 원인이 된다. 화소 재구성 알고리즘은 화소의 중복 보간을 제거하여 부화소 움직임 추정기의 연산량을 감소시킨다. 제안한 알고리즘은 고속 전역 부화소 탐색 알고리즘과 비교하여 보간 시 연산량이 18.1% 감소하였으며, PSNR 감소는 평균 0.067dB로 화질의 열화는 매우 미비했다. 그러므로 제안한 알고리즘은 저전력의 고효율을 요구하는 모바일 응용에 적합하다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권4호
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• pp.418-425
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• 2012

In this paper, efficient implementation of error correction code (ECC) processing circuits based on single error correction and double error detection (SEC-DED) code with check bit pre-computation is proposed for memories. During the write operation of memory, check bit pre-computation eliminates the overall bits computation required to detect a double error, thereby reducing the complexity of the ECC processing circuits. In order to implement the ECC processing circuits using the check bit pre-computation more efficiently, the proper SEC-DED codes are proposed. The H-matrix of the proposed SEC-DED code is the same as that of the odd-weight-column code during the write operation and is designed by replacing 0's with 1's at the last row of the H-matrix of the odd-weight-column code during the read operation. When compared with a conventional implementation utilizing the odd-weight- column code, the implementation based on the proposed SEC-DED code with check bit pre-computation achieves reductions in the number of gates, latency, and power consumption of the ECC processing circuits by up to 9.3%, 18.4%, and 14.1% for 64 data bits in a word.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제16권12호
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• pp.4081-4098
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• 2022

With the aim of tackling the contradiction between computation intensive industrial applications and resource-weak Edge Devices (EDs) in Industrial Internet of Things (IIoT), a novel computation task offloading scheme in SDIN-enabled MEC based IIoT is proposed in this paper. With the aim of reducing the task accomplished latency and energy consumption of EDs, a joint optimization method is proposed for optimizing the local CPU-cycle frequency, offloading decision, and wireless and computation resources allocation jointly. Based on the optimization, the task offloading problem is formulated into a Mixed Integer Nonlinear Programming (MINLP) problem which is a large-scale NP-hard problem. In order to solve this problem in an accessible time complexity, a sub-optimal algorithm GPCOA, which is based on hybrid evolutionary computation, is proposed. Outcomes of emulation revel that the proposed method outperforms other baseline methods, and the optimization result shows that the latency-related weight is efficient for reducing the task execution delay and improving the energy efficiency.

• International Journal of Computer Science & Network Security
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• 제23권8호
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• pp.146-158
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• 2023

Smart City is gaining attention with the advancement of Information and Communication Technology (ICT). ICT provides the basis for smart city foundation; enables us to interconnect all the actors of a smart city by supporting the provision of seamless ubiquitous services and Internet of Things. On the other hand, Crowdsourcing has the ability to enable citizens to participate in social and economic development of the city and share their contribution and knowledge while increasing their socio-economic welfare. This paper proposed a hybrid model which is a compound of human computation, machine computation and citizen crowds. This proposed hybrid model uses knowledge-based crowdsourcing that captures collaborative and collective intelligence from the citizen crowds to form democratic knowledge space, which provision solutions in areas of civic innovations. This paper also proposed knowledge-based crowdsourcing framework which manages knowledge activities in the form of human computation tasks and eliminates the complexity of human computation task creation, execution, refinement, quality control and manage knowledge space. The knowledge activities in the form of human computation tasks provide support to existing crowdsourcing system to align their task execution order optimally.

• 정보보호학회논문지
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• 제13권5호
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• pp.3-15
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• 2003

안전한 그룹 통신은 그룹에 속한 멤버들만이 안전하면서도 비밀스럽게 서비스를 받을 수 있도록 보장하는 것이며, 안전한 그룹 통신을 하기 위해서는 안전하게 그룹키를 분배하고, 그룹 멤버들에 대한 효율적인 관리가 중요하다. 또한, 그룹키를 생성, 분배 그리고 갱신하는데 있어 적은 통신량과 연산량이 필요하다. 본 논문에서는 그룹키를 생성하기 위해서, 잘 알려진 두 멤버간의 Diffie-Hellman 키 교환과 완전 이진 트리를 이용한 새로운 방법를 제안한다. 본 논문에서는 많은 양의 모듈러 멱승 연산의 일부를 곱셈 연산으로 대체하여 한 멤버에게 필요한 멱승 연산량을 최소화시킨다. 그리하여, 제안한 프로토콜은 그룹의 크기에 관계없이 프로토콜을 수행하기 위하여 각 그룹의 멤버는 항상 일정한 모듈러 멱승 연산과 곱셈 연산을 수행하며, 기존 프로토콜보다 전체 모듈러 멱승 연산량도 적다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권6호
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• pp.3254-3272
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• 2017

With the development of wireless access technologies and the popularity of mobile intelligent terminals, cloud computing is expected to expand to mobile environments. Attribute-based encryption, widely applied in cloud computing, incurs massive computational cost during the encryption and decryption phases. The computational cost grows with the complexity of the access policy. This disadvantage becomes more serious for mobile devices because they have limited resources. To address this problem, we present an efficient verifiable outsourced scheme based on the bilinear group of prime order. The scheme is called the verifiable outsourced computation ciphertext-policy attribute-based encryption scheme (VOC-CP-ABE), and it provides a way to outsource intensive computing tasks during encryption and decryption phases to CSP without revealing the private information and leaves only marginal computation to the user. At the same time, the outsourced computation can be verified by two hash functions. Then, the formal security proofs of its (selective) CPA security and verifiability are provided. Finally, we discuss the performance of the proposed scheme with comparisons to several related works.

• 대한수학회논문집
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• 제32권1호
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• pp.215-224
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• 2017

In this paper, we propose a method of order two for the computation of positive solutions to a boundary value problem of the linear beam equation. The method is based on the Power method for the eigenvector associated with the dominant eigenvalue and the Crout-like factorization algorithm for the banded system of linear equations. It is extremely fast due to the linear complexity of the linear system solver. Numerical result of a test problem is included.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제5B권1호
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• pp.39-42
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• 2005

Though full 3D analysis is the proper method to analyze the hybrid stepping motor (HSM), it has weak points in the areas of computation time and complexity. This paper introduces 2D FEA using a virtual magnetic barrier for the axial cross section to save computation time. For the purpose of 2D FEA, the virtual magnetic barrier and equivalent permanent magnet model of HSM are proposed. This result is compared with that of experimental and 3D analysis, considered as a reference result.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.687-690
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• 1998

The full Viterbi detector for EPRML read channel system needs large area due to complex computation. There are several conventional methods to reduce the complexity such as GVA(Generalized Viterbi Algorithm) and BMS(Branch Metric Shift). This paper proposes another method, FVD(Folding Viterbi Detector), that has state transition diagram folded with inverted states. Compared with GVA detector, FVD requires only 61% gates and has lower power consumption and better BER performance.