• Journal of information and communication convergence engineering
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• v.6 no.4
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• pp.376-382
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• 2008

Developing highly cost-efficient and reliable embedded systems demands hardware/software co-design and co-simulation due to fast TTM and verification issues. So, it is essential that Platform-Based SoC design methodology be used for enhanced reusability. This paper addresses a reusable SoC platform based on OpenCores soft processor with reconfigurable architectures for hardware/software codesign methodology. The platform includes a OpenRISC microprocessor, some basic peripherals and WISHBONE bus and it uses the set of development environment including compiler, assembler, and debugger. The platform is very flexible due to easy configuration through a system configuration file and is reliable because all designed SoC and IPs are verified in the various test environments. Also the platform is prototyped using the Xilinx Spartan3 FPGA development board and is implemented to a single chip using the Magnachip cell library based on $0.18{\mu}m$ 1-poly 6-metal technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.4
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• pp.209-215
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• 2009

Reconfigurable array architecture is recently attracting much attention. It is a flexible hardware architecture, which can dynamically change its configuration to execute various functions while maintainning high performance. However, pursuing flexibility and performance at the same time leads to complexity, thereby makes the mapping of applications a difficult process. There have been attempts to use compiler or high level synthesis techniques to solve the problem. In this paper, we propose yet another method, which uses libraries for the mapping to provide an abstracttion of the internal structure and at the same time to reduce the development time and efforts through the automated process. We have selected a JPEG decoder as an example to apply the proposed method. As a result, we obtained about 20% less performance compared to manual mapping but development time is dramatically reduced to less than 1%.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.2
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• pp.83-88
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• 2015

Core-A is 32-bit synthesizable processor core with a unique instruction set architecture (ISA). In this paper, the Core-A ISA is introduced with discussion of useful features and the development environment, including the software tool chain and hardware on-chip debugger. Core-A is described using Verilog-HDL and can be customized for a given application and synthesized for an application-specific integrated circuit or field-programmable gate array target. Also, the GNU Compiler Collection has been ported to support Core-A, and various predesigned platforms are well equipped with the established design flow to speed up the hardware/software co-design for a Core-A-based system.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.18 no.35
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• pp.1-8
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• 1995

Automatic inspection system software for display image characteristic of CRT is developed. There are two major contributions of this software development. One is that the data from measuring equipments which was usually collected manually is automatically collected through RS-232C port and is saved in computer, then, trend analysis graph and final reports are generated. The other is that evauation of characteristic of electron gun was automatically processed by CCD camera and image processing technique. The system is developed under MS-Windows environment utilizing Borland C++4.0 Compiler and DT 3852-8 image processor board. This system can save the time and man power to measure and to anayze the image characteristics relative to current method.

• Journal of KIISE:Software and Applications
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• v.31 no.10
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• pp.1418-1429
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• 2004

This paper presents GrammE, a grammar development environment for feature-based APSG. At the stage of a grammar development, analysis are be done by interpreting the grammar under development, given in a text format, it is relatively easy to diagnose the grammar. Once developed, the grammar is compiled, by using the embedded grammar compiler, into a parser program written in $C^{++}$. The parser program can be used in various types of natural language processing systems requiring syntactic analysis. GrammE is language-independent, and so far has been used for the development of Korean and Chinese grammars.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.867-870
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• 2014

Currently a number of universities and other educational institutions in the e-learning education system being implemented. Also that there is a demand. However, existing e-learning system has many problems. First, the theory of how the university -centered education and training institutions to adopt e-learning system has become the biggest obstacle. In addition, students can not engage the problem of a one-way lecture. In this paper, the theory -oriented and practice to overcome the one-way river systems programming language will develop e-learning content. Using socket communication and multi-threaded server-side Web browser on the client side through the compiler without installing a separate application installation and environmental learning environment can be unrestricted. Hands- content programming language allows the learner to direct the client-side source code in a web browser by entering the lecture is leading the way. For learners to enter the source code compiled to run on the server side, the compiler provides the learner results. Hands- because the future e-learning content development in e-learning systems will be a major contribution to.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.30 no.4
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• pp.537-544
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• 2020

Advances in detection techniques, such as mutation and obfuscation, are being advanced with the development of malware technology. In the malware detection technology, unknown malware detection technology is important, and a method for Malware Authorship Attribution that detects an unknown malicious code by identifying the author through distributed malware is being studied. In this paper, we try to extract the compiler information affecting the binary-based author identification method and to investigate the sensitivity of feature selection, probability and non-probability models, and optimization to classification efficiency between studies. In the experiment, the feature selection method through information gain and the support vector machine, which is a non-probability model, showed high efficiency. Among the optimization studies, high classification accuracy was obtained through feature selection and model optimization through the proposed framework, and resulted in 48% feature reduction and 53 faster execution speed. Through this study, we can confirm the sensitivity of feature selection, model, and optimization methods to classification efficiency.

• Journal of the Korean Institute of Intelligent Systems
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• v.20 no.4
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• pp.580-585
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• 2010

In this paper, The object Tracking System is designed by SOPC based Nios II embedded processor and C2H compiler. And this system using single PTZ camera can effectively control IPs in the platform of SOPC based Nios II Embedded Processor and creating IP by C2H(C-To-Hardware) compiler for image-in/output, image-processing and devices of communication that can supply various monitoring information to network or serial. Accordingly, Special quality and processing speed of object tracking using high-quality algorism in the system is improved by hardware/software programming methods.

• Journal of the Korean Society for Precision Engineering
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• v.10 no.4
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• pp.227-235
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• 1993

In this paper, the development of a high performance flexible controller is described. The hardware of the controller, based on VME-bus, consists of four M68020 single-board computers (32-bit) with M68881 numerical coprocessors, two M68040 single board donputers, I/O devices (such as A/D and D/A converters, paraller I/O, encoder counters), and bus-to-bus adaptor. This software, written in C and based on X-window environment with Unix operating system, includes : text editor, compiler, downloader, and plotter running in a host computer for developing control program ; device drivers, scheduler, and mathemetical routines for the real time control purpose ; message passing, file server, source level debugger virtural terminal, etc. The hardware and software are structured so that the controller might have both flexibility and extensibility. In papallel to the controller, a three degrees of freedom kinematically redundant robot has been developed at the same time. The development of the same time. The development of the robot was undertaken in order to provide, on the one hand, a computationally intensive plant to which to apply the controller, and on the other hand a research tool in the field of kinematically redundant manipulator, which is, as such, an important area. By using the controller, dynamic control of the redundant manipulator was successfully experimented, showing the effectiveness and flexibility of the controller.

• Journal of Digital Contents Society
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• v.8 no.3
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• pp.377-383
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• 2007

The existing PMP contents have been usually providing moving picture services. However the rapid increasement by users of mobile equipment brought the need for multipurpose convergence, it is needed to develop the appropriate contents as these products appear. In this paper we designed the easy development environment for game contents that provide limited killer services. Game with the limited PMP input devices as a variety of portable input devices are developed and the equipment function of PMP itself is enhanced, its field of application will be further extended. So, we will design cross platform game development environment for PMP that is able to give friendly and valuable game contents to PMP users.