• Title/Summary/Keyword: Common-mode level

Search Result 113, Processing Time 0.024 seconds

새로운 능동형 커먼 모드 전압 감쇄기를 이용한 PWM 인버터의 고주파 누설전류 억제 (A new active common mode voltage Damper to suppress high frequency leakage current of PWM Inverter)

  • 구정회;이상훈;박성준;김철우
    • 전력전자학회논문지
    • /
    • 제6권5호
    • /
    • pp.423-431
    • /
    • 2001
  • 최근의 유도전동기 구동 시스템은 고속의 ON, OFF동작 특성을 가진 전력 반도체 소자를 가진 인버터와 이를 제어하기 위한 SVPWM(Space Vector PWM)제어이론에 의하여 주로 구성되어 있다. 이러한 PWM 인버터는 정현파 형태의 전압과 전류를 얻기 위해 높은 스위칭 주파수로 동작을 하게 되고, 매 스위칭이 일어나는 순간마다 di/dt 및 dv/dt가 매우 크기 때문에 무시할 수 없는 양의 고주파 누설전류가 고정자 권선과 프레임 사이에 존재하는 기생 커패시터를 통해 접지로 흐르게 된다. 이로 인해 누전보호 계전기의 오동작 및 모터 권선의 절연파괴에 의한 모터의 수명단축 등과 같은 문제점을 야기하게 된다. 본 논문에서는 이러한 문제점을 일으키는 고주파 누설 전류와 커먼 모드 전압을 감쇄하기 위하여 4 레벨 반파 브릿지 인버터에 의해 커먼 모드 전압과 크기가 같고 극성이 반대인 전압을 생성하고, 이 전압을 커먼 모드 트랜스포머에 인가하여 누설 전류의 원인이 되는 커먼 모드 전압을 상쇄시킬 수 있는 새로운 형태의 능동형 커먼 모드 전압 감쇄기를 제안하였다. 제안된 감쇄기의 동작 성능을 P-SPICE를 이용한 시뮬레이션 및 실험을 통하여 검증하였다.

  • PDF

오프셋 보정 기술을 이용한 비냉각형 적외선 센서용 신호검출 회로 설계 (Design of Readout IC for Uncooled Infrared Bolometer Sensor using Bias Offset Correction Technique)

  • 박상원;황상준;홍승우;정은식;성만영
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
    • /
    • pp.23-25
    • /
    • 2005
  • Infrared bolometer sensor's variation is detected by voltage drop between reference resistor and bolometer resistor in this architecture. One of the serious problems in this architecture is that these resistors value has a process variation. So common-mode level could be different from expectation in room temperature. Different common-mode level could lead to wrong output at the end of readout circuit. We suggest useful method to solve this problem. Difference correction using capacitor has reduced CM level difference to 86% for 1 $M\Omega$. bolometer and reference resistor's 10% variation.

  • PDF

An Optimized Control Method Based on Dual Three-Level Inverters for Open-end Winding Induction Motor Drives

  • Wu, Di;Su, Liang-Cheng;Wu, Xiao-Jie;Zhao, Guo-Dong
    • Journal of Power Electronics
    • /
    • 제14권2호
    • /
    • pp.315-323
    • /
    • 2014
  • An optimized space vector pulse width modulation (SVPWM) method with common mode voltage elimination and neutral point potential balancing is proposed for an open-end winding induction motor. The motor is fed from both of the ends with two neutral point clamped (NPC) three-level inverters. In order to eliminate the common mode voltage of the motor ends and balance the neutral point potential of the DC link, only zero common mode voltage vectors are used and a balancing control factor is gained from calculation in the strategy. In order to improve the harmonic characteristics of the output voltages and currents, the balancing control factor is regulated properly and the theoretical analysis is provided. Simulation and experimental results show that by adopting the proposed method, the common mode voltage can be completely eliminated, the neutral point potential can be accurately balanced and the harmonic performance for the output voltages and currents can be effectively improved.

비엔나 정류기의 공통모드 전압 저감이 가능한 캐리어 비교 PWM 기법 (Carrier Comparison PWM Method of Vienna Rectifier for Reduction of Common Mode Voltage)

  • 이동현;최원일;홍창표;김학원;조관열
    • 전력전자학회논문지
    • /
    • 제21권2호
    • /
    • pp.126-133
    • /
    • 2016
  • This paper proposes a new PWM method to reduce the common mode voltage change in three-level Vienna rectifier. This new proposed PWM method uses medium voltage vector for the three-level Vienna rectifier to determine the sum of three-phase voltage zero, and the common mode voltage variation is decreased. Using the carrier comparison method, the switching function generator for three-level Vienna rectifier has been proposed. The effects of the proposed PWM method have been verified through simulation using the PSIM.

3상 3-레벨 컨버터의 누설전류 저감과 NP 전류 제어를 위한 캐리어 기반 LFCPWM (Carrier Based LFCPWM for Leakage Current Reduction and NP Current Control in 3-Phase 3-Level Converter)

  • 이은철;최남섭
    • 전력전자학회논문지
    • /
    • 제27권5호
    • /
    • pp.446-454
    • /
    • 2022
  • This study proposes a carrier-based pulse width modulation (PWM) method for leakage current reduction and neutral point (NP) current control in a three-phase three-level converter, which is a carrier-based PWM version of the previously proposed low-frequency common mode voltage PWM. Three groups of space vectors with the same common mode voltage are used. When the averaged NP current needs to be positive or negative, the specific groups are employed to produce low-frequency common mode voltages. The validity of the proposed PWM method is verified through experiments.

Common-Mode Voltage Elimination with an Auxiliary Half-Bridge Circuit for Five-Level Active NPC Inverters

  • Le, Quoc Anh;Park, Do-Hyeon;Lee, Dong-Choon
    • Journal of Power Electronics
    • /
    • 제17권4호
    • /
    • pp.923-932
    • /
    • 2017
  • This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.

Common-Mode Voltage Elimination for Medium-Voltage Three-Level NPC Inverters Based on an Auxiliary Circuit

  • Le, Quoc Anh;Lee, Sangmin;Lee, Dong-Choon
    • Journal of Power Electronics
    • /
    • 제16권6호
    • /
    • pp.2076-2084
    • /
    • 2016
  • In this paper, a novel scheme to eliminate common-mode voltage (CMV) is proposed for three-level neutral-point clamped (NPC) inverters. In the proposed scheme, a low-power full-bridge converter is utilized to produce compensatory voltage for CMV, which is injected into an NPC inverter through a single-phase four-winding transformer. With the proposed circuit, the power range for applications is not limited, and the maximum modulation index of the inverter is not reduced. These features are suitable for high-power medium-voltage machine drives. The effectiveness of the proposed method is verified by simulation and experimental results.

Carrier Based Common Mode Voltage Reduction Techniques in Neutral Point Clamped Inverter Based AC-DC-AC Drive System

  • Ojha, Amit;Chaturvedi, Pradyumn;Mittal, Arvind;Jain, Shailendra
    • Journal of Power Electronics
    • /
    • 제16권1호
    • /
    • pp.142-152
    • /
    • 2016
  • Common mode voltage (CMV) generation is a major problem in switching power converter fed induction motor drive systems. CMV is the zero sequence voltage generated due to the switching action of power converters. Even a small magnitude of CMV with a high rate of change may circulate large bearing currents which may damage a machine's bearings and shorten its life. There are several methods of controlling CMV. This paper presents 3-level sinusoidal pulse width modulation based techniques to control the magnitude and rate of change of CMV in multilevel AC-DC-AC drive systems. Simulation and experimental investigations have been presented to validate the performance of proposed technique to control CMV in 3-level neutral point clamped inverter based AC-DC-AC system.

Limited Feedback Interference Alignment in MIMO Power Line Communication with Common-mode Reception

  • Ahiadormey, Roger Kwao;Anokye, Prince;Park, Seok-Hwan;Lee, Kyoung-Jae
    • 한국정보기술학회 영문논문지
    • /
    • 제9권2호
    • /
    • pp.1-14
    • /
    • 2019
  • This paper considers a multiple-input multiple-output (MIMO) power line communication (PLC) network where interference alignment (IA) technique is used to mitigate the interference that arises in multi-user networks. IA as a precoding technique requires perfect channel state information (CSI) to achieve maximum multiplexing gain. Due to the common-mode reception at the receiver ports, we assume imperfect CSI for the IA precoding design. Here, the CSI is quantized and sent via feedback to the transmit ports. For different levels of CSI quantization, we evaluate the performance of various IA algorithms via Monte Carlo simulations. Simulation results reveal the superior performance of the proposed scheme due to common-mode reception in IA MIMO PLC networks. It is shown that for a quantization level of 5 bits, the CM reception improves the sum-rate by up to 70%.

Carrier Phase-Shift PWM to Reduce Common-Mode Voltage for Three-Level T-Type NPC Inverters

  • Nguyen, Tuyen D.;Phan, Dzung Quoc;Dao, Dat Ngoc;Lee, Hong-Hee
    • Journal of Power Electronics
    • /
    • 제14권6호
    • /
    • pp.1197-1207
    • /
    • 2014
  • Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.