• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.2
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• pp.85-91
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• 2022

This study proposes a high efficiency bridgeless Power Factor Correction (PFC) converter with improved common mode noise characteristics. Conventional PFC has limitations due to low efficiency and enlarged heat sink from considerable conduction loss of bridge diode. By applying a Common Mode (CM) coupled inductor, the proposed bridgeless PFC converter generates less conduction loss as only a small magnetizing current of the CM coupled inductor flows through the input diode, thereby reducing or removing heat sink. The input diode is alternately conducted every half cycle of 60 Hz AC input voltage while a negative node of AC input voltage is always connected to the ground, thus improving common mode noise characteristics. With the aim to improve switching loss and reverse recovery of output diode, the proposed circuit employs Critical Conduction Mode (CrM) operation and it features a simple Zero Current Detection (ZCD) circuit for the CrM. In addition, the input current sensing is possible with the shunt resistor instead of the expensive current sensor. Experimental results through 480 W prototype are presented to verify the validity of the proposed circuit.

• Journal of the Korea Society of Computer and Information
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• v.22 no.8
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• pp.63-72
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• 2017

In this paper, we propose a security architecture for HDLC-based T4 class common data link. The common data links are composed of point-to-point, multi-to-point, and point-to-multi mode. For multi-to-point mode, one node has a bundle of point-to-point links with different end-point on the other side of the links. Thus multi-to-point mode can be considered as a bundle of point-to-point mode. Point-to-multi mode is broadcasting link. For point-to-point mode we adopted robust security network scheme to establish a secure data link, and for multi-to-point mode we use broadcast encryption scheme based on ID-based cryptography to distribute encryption key for broadcasting message encryption. We also included MACsec technology for point-to-point data link security. Computational and communicational complexity analysis on the broadcast encryption have been done.

• Journal of Advanced Navigation Technology
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• v.15 no.4
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• pp.571-577
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• 2011

This paper presents a novel balanced filter design based on a metamaterial structure applicable to differential-mode excitation. The metamaterial structure is based on a unit-cell which under a differential-mode excitation behaves like composite right/left-handed(CRLH) metamaterial with filter characteristics. In contrast, the metamaterial unit-cell is below cut-off under a common-mode excitation. Experimental results are used to verify the proposed metamaterial's differential-mode characteristics. The metamaterial is fabricated with a balanced filter design resulting in an operating frequency range of 960~1000 MHz with a insertion loss of 4.1 dB.

• Journal of the Optical Society of Korea
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• v.18 no.6
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• pp.783-787
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• 2014

This paper presents an improved vertical alignment nematic liquid crystal mode characterized by the protrusions or slits of the top substrate and additional stripe type common electrodes with polarity switching of the bottom substrate to improve multi-domain vertically aligned (MVA) and patterned vertically aligned (PVA) nematic modes. MVA and PVA modes have disadvantages such as an LC disclination in the vicinity of the middle region of electrodes between the top and bottom protrusions in MVA mode or the top and bottom slits in PVA mode. Therefore, the stripe type common electrode generating a horizontal electric field and the protrusion or slit producing some pretilt of liquid crystals (LCs) were used to improve the LC disclination, which influences the transmittance and response speed. The simulation results showed that the proposed VA mode has higher transmittance than the MVA and PVA modes. As a result, the proposed VA mode can improve the response speed and transmittance remarkably, which makes it useful for upgrading the LCD display quality.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.9
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• pp.985-991
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• 2008

This paper presents a novel balanced mixer receiver front-end design based on a metamaterial structure applicable to differential-/common-mode excitation. This metamaterial structure functions as a leaky-wave antenna and provides in-trinsic common-mode suppression. Low LO leakage and high RF to LO isolation are achieved without additional filters for LO and RF paths. The metamaterial is based on a unit-cell which under a differential-mode excitation behaves like a composite right/left-handed(CRLH) metamaterial. In contrast, the metamaterial unit-cell is below cut-off under a common-mode excitation. Experimental results are used to verify the proposed metamaterial's differential-/common-mode characteristics. The metamaterial is integrated with a balanced mixer design resulting in an operation frequency range of $1.96{\sim}2.40$ GHz with an optimum mixer conversion loss of 21.1 dB at 2,4 GHz.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.1
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• pp.85-93
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• 2007

This paper presents new LVDS I/O circuits with a high noise margin for use in highly parallel I/O environments. The proposed LVDS I/O includes transmitter and receiver parts. The transmitter circuits consist of a differential phase splitter and a output stage with common mode feedback(CMFB). The differential phase splitter generates a pair of differential signals which have a balanced duty cycle and $180^{\circ}$ phase difference over a wide supply voltage variation due to SSO(simultaneous switching output) noises. The CMFB output stage produces the required constant output current and maintains the required VCM(common mode voltage) within ${\pm}$0.1V tolerance without external circuits in a SSO environment. The proposed receiver circuits in this paper utilizes a three-stage structure(single-ended differential amp., common source amp., output stage) to accurately receive high-speed signals. The receiver part employs a very wide common mode input range differential amplifier(VCDA). As a result, the receiver improves the immunities for the common mode noise and for the supply voltage difference, represented by Vgdp, between the transmitter and receiver sides. Also, the receiver produces a rail-to-rail, full swing output voltage with a balanced duty cycle(50% ${\pm}$ 3%) without external circuits in a SSO environment, which enables correct data recovery. The proposed LVDS I/O circuits have been designed and simulated with 0.18um TSMC library using H-SPICE.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.504-508
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• 2004

An EMC analysis of a switched mode power supply (SMPS) have been usually using unbalance circuit topologies and the major factor of disturbance is parasitic capacitance. We have proposed a balanced switching converter circuit, which is an effective way to reduce the common mode conducted noise. In this paper presents the relationship between common mode current and radiated field.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1524-1532
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• 2015

Conventional space vector pulse width modulation based asymmetrical dual inverter configuration produces high common mode voltage (CMV) variations. This CMV causes the flow of common mode current, which adversely affects the motor bearings and electromagnetic interference of nearby electronic systems. In this study, a simple and generalized carrier based pulse width modulation (PWM) technique is proposed for dual inverter configuration. This simple approach generates various continuous and discontinuous modulating signals based PWM algorithms. With the application of the discontinuous modulating signal based PWM algorithm to the asymmetrical dual inverter configuration, the CMV can be reduced with a slightly improved quality of output voltage. The performance of the continuous and discontinuous modulating signals based PWM algorithms is explored through both theoretical and experimental studies. Results show that the discontinuous modulating signal based PWM algorithm efficiently reduces the CMV and switching losses.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.5
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• pp.507-515
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• 2004

With the advent of fast power devices, the high dv/dt voltage produced by PWM inverts have been found to cause EMI noise, shaft voltage and bearing current. This paper describes the application of newly developed Conducted EMI reduction SVPWM technique in induction motor drives. The newly developed common mode voltage reduction SVPWM technique don't use any zero-vector states for inverter control, hence it can restrict the common mode voltage more than conventional PWM technique. The validity of the proposed technique by software approach is verified through simulation and experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.1
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• pp.31-40
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• 2014

This paper describes an optimal configuration for multi-central inverters in a medium-voltage (MV) grid, which is suitable for large-scale photovoltaic (PV) power plants. We theoretically analyze a proposed common-mode equivalent model for problems associated with multi-central transformerless-type three-phase full bridge(3-FB) PV inverters employing two-winding MV transformers. We propose a synchronized PWM control strategy to effectively reduce the common-mode voltages that may simultaneously occur. In addition, we propose that the existing 3-FB topology may also have the configuration of a multi-central inverter with a two-winding MV transformer by making a simple circuit modification. Simulation and experimental results of three 350kW PV inverters in a multi-central configuration verify the effectiveness of the proposed synchronization control strategy. The modified transformerless-type 3-FB topology for a multi-central PV inverter configuration is verified using an experimental prototype of a 100kW PV inverter.