• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.12
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• pp.2286-2292
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• 2011

In this paper we present the design of Low Noise Amplifier(LNA), mixer and filter for RF front-end part of partial discharge monitoring system. The monitoring system of partial discharge in high voltage power machinery is used to prevent many kinds of industrial accidents, and is usually composed of three parts - sensor, RF front-end and digital microcontroller unit. In our study, LNA, mixer and filter are key components of the RF front-end. The LNA consists of common gate and common source-cascaded structure and uses the resistive feedback for broad band matching. A coupled line structure is utilized to implement the filter, of which size is reduced by the meander structure. The mixer is designed using dual gate structure for high isolation between RF and local oscillator signal.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.421-424
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• 2001

In this paper, We have designed and fabricated VCO in two way, the common source and common gate circuit for I local oscillator of 60 GHz wireless LAN system. The VCO employed a GaAs MESFET for negative resistance and a varactor diode for frequency tuning. The common gate VCO was measured the phase noise -112 dBc/Hz at the 1 MHz frequency offset. The output power and the second harmonic frequency suppression were 7.81 dBm and -29.3 dBc when tuning voltage was 3V, respectively. The total size of VCO was 28.6$\times$12.14 $\textrm{mm}^2$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.111-117
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• 2006

Reconfigurable CMOS low-noise amplifier (LAN) has been developed for multi-mode/multi-band wireless receiver. By employing common-gate input stage, the performance can be optimized for multiple operation bands by simply controlling the output load impedance. Although the conventional common-gate LAN has larger than 3dB noise figure (NF), the newly developed negative feedback scheme enables the common-gate input LNA to have less than 2dB NF. To have optimum linearity performance of wireless receiver, the gain of the LNA can be controlled. The LNA implemented in a 0.13mm CMOS technology shows $19{\sim}20dB$ voltage gain, $1.7{\sim}2.0dB$ NF, -2dBm iIP3 at $1.8{\sim}2.5GHz$ frequency range. The LNA dissipates 7mW from a 1.2V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.2
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• pp.9-14
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• 2012

In this study, multi-finger RF MOSFET substrate parameters are accurately extracted by using S-parameters measured from common source-bulk and common source-gate test structures. Using this extraction method, the accuracy of an asymmetrical model with three substrate resistances is verified by observing better agreement with measured Y-parameters than a simple model with a single substrate resistance. The modeled S-parameters of the asymmetrical model also show excellent agreement with measured ones up to 20GHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04a
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• pp.165-168
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• 2000

An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color fiat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. In addition, PDAST can estimate voltage distributions in common electrode which can affect pixel voltage and feed-through voltage. Since PDAST can simulate the gate, data and the pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of common electrode voltage can be effectively analyzed. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.44-47
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• 2008

In this paper, a new circuit is proposed to minimize the charging and discharging current mismatch in charge pump for UWB PLL application. By adding a common-gate and a common-source amplifier and building the feedback voltage regulator, the high driving charge pump currents are accomplished. The proposed circuit has a wide operation voltage range, which ensures its good performance under the low power supply. The circuit has been implemented in an IBM 0.13um CMOS technology with 1.2V power supply. To evaluate the design effectiveness, some comparisons have been conducted against other circuits in the literature.

• Communications of the Korean Mathematical Society
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• v.31 no.3
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• pp.507-518
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• 2016

The aim of this paper is to prove some strong convergence theorems for the modified Ishikawa iteration process involving a pair of a generalized asymptotically nonexpansive single-valued mapping and a quasi-nonexpansive multi-valued mapping in the framework of $\mathbb{R}$-trees under the gate condition.

• 한국정보통신설비학회:학술대회논문집
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• 2009.08a
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• pp.364-366
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• 2009

광 바이오 센서 시스템에서 Trans-Impedance amplifier (TIA)는 광검출기로부터 입력단으로 들어오는 미세한 전기 신호를 원하는 신호레벨까지 증폭하는 역할을 한다. TIA는 광 바이오 센서 시스템의 감도 (sensitivity)를 결정하는 매우 중요한 회로로 저잡음, 저전력, 낮은 입력 임피던스 등의 특성이 요구되어진다. 본 논문에서는 광 바이오 센서 시스템에서 요구되어 지는 저전력, 저잡음 성능을 구현하기 위하여 regulated cascode (RGC) TIA를 설계하였다. 본 연구에서는 기존 common gate (CG) 기법의 TIA에서 전류원 역할을 하는 current source를 저항으로 대체하고, local feedback stage를 이용하는 RGC TIA를 저잡음, 저전력 특성 및 회로 면적 감소의 장점을 갖도록 설계하였다.

• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.3
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• pp.201-206
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• 2019

This study presents the design and experimental result of a GaN-based DC-DC converter with an integrated gate driver. The GaN device is attractive to power electronic applications due to its superior device performance. However, the switching loss of a GaN-based power converter is susceptible to the common source inductance, and converter efficiency is severely degraded with a large loop inductance. The objective of this study is to achieve high-efficiency power conversion and the highest power density using a multiphase integrated half-bridge GaN solution with minimized loop inductance. Before designing the converter, several GaN and Si devices were compared and loss analysis was conducted. Moreover, the impact of common source inductance from layout parasitic inductance was carefully investigated. Experimental test was conducted in buck mode operation at 48 -12 V, and results showed a peak efficiency of 97.8%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1111-1116
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• 2011

In this paper, a 60 GHz bidirectional active phase shifter with 130 nm CMOS is presented by replacing CMOS passive switchs in switched-line type phase shifter with Common Gate Amplifier(bidirectional amplifier). Bidirectional active phase shifter is composed of bidirectional amplifier blocks and passive delay line network blocks. The suitable topology of bidirectional amplifier block is CGA(Common Gate Amplifier) topology and matching circuits of input and output are symmetrical due to design same characteristic of it's forward and reverse way. The direction(forward and reverse way) and amplitude of amplification can be controlled by only one bias voltage($V_{DS}$) using combination bias circuit. And passive delay line network blocks are composed of microstrip line. An 1-bit phase shifter is fabricated by Dongbu HiTek 1P8M 130-nm CMOS technology and simulation results present -3 dB average insertion loss and respectively 90 degree and 180 degree phase shift at 60 GHz.