• 제목/요약/키워드: Class-D inverter

검색결과 27건 처리시간 0.024초

부유 인덕턴스의 영향을 고려한 새로운 CLASS-D 직렬부하 공진형 인버터 (A new Class-D voltage source series-loaded resonant inverter topology considering stray inductance influences)

  • 이병국;유상봉;서범석;현동석
    • 대한전기학회논문지
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    • 제45권2호
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    • pp.199-215
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    • 1996
  • A new Class-D series-loaded resonant inverter topology which can minimize the influences of the stray inductances is presented. In the conventional Class-D inverters, the stray inductances not only result in the overvoltage which gives the switches voltage stresses, but also in the high frequency resonant currents during turn-off transients. The new Class-D inverter is superior to the conventional Class-D inverters with respect to minimization of the problems caused by the stray inductances and is more suitable for high power and high frequency inverter systems such as induction heating. The validity of the new Class-D inverter is verified by simulation and experimental results.

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저전력 오디오 응용을 위한 Class-C 인버터 사용 단일 비트 3차 피드포워드 델타 시그마 모듈레이터 (A Single-Bit 3rd-Order Feedforward Delta Sigma Modulator Using Class-C Inverters for Low Power Audio Applications)

  • 황준섭;천지민
    • 한국정보전자통신기술학회논문지
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    • 제15권5호
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    • pp.335-342
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    • 2022
  • 본 논문에서는 오디오 애플리케이션을 위한 단일 비트 3차 피드포워드 델타 시그마 변조기를 제안한다. 제안된 변조기는 저전압 및 저전력 애플리케이션을 위한 클래스-C 인버터를 기반으로 한다. 고정밀 요구 사항을 위해 레귤레이티드 캐스코드 구조의 클래스-C 인버터는 DC 이득을 증가시키고 저전압 서브쓰레스홀드 증폭기 역할을 한다. 제안된 클래스-C 인버터 기반 변조기는 180nm CMOS 공정으로 설계 및 시뮬레이션되었다. 성능 손실이 없으면서 낮은 공급 전압 호환성을 가지도록 제안된 클래스-C 인버터 기반 스위치드 커패시터 변조기는 높은 전력 효율을 달성하였다. 본 설계는 20kHz의 신호 대역폭 및 4MHz의 샘플링 주파수에서 동작시켜 93.9dB의 SNDR, 108dB의 SNR, 102dB의 SFDR 및 102dB의 DR를 달성하면서 0.8V 전원 전압에서 280μW의 전력 소비만 사용한다.

Single-Stage Half-Bridge Electronic Ballast Using a Single Coupled Inductor

  • Cho, Yong-Won;Kwon, Bong-Hwan
    • Journal of Power Electronics
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    • 제12권5호
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    • pp.699-707
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    • 2012
  • This paper proposes a single-stage half-bridge electronic ballast with a high power factor using only a single coupled inductor. Compared to conventional high power factor electronic ballasts, the proposed ballast is a simpler circuit with a low cost and a high reliability. The proposed ballast is made up of a power-factor-correction (PFC) circuit and a self-oscillating class-D inverter. The PFC and inverter stages of the proposed ballast are simplified by sharing only a single coupled inductor and two common switches. The proposed PFC circuit can achieve a high power factor and low voltage stresses of the switches. A saturable transformer in the self-oscillating class-D inverter determines the switching frequency of the ballast. Experimental results obtained on a 30W fluorescent lamp are discussed.

Improved Charge Pump Power Factor Correction Electronic Ballast Based on Class DE Inverter

  • Thongkullaphat, Sarayoot
    • International journal of advanced smart convergence
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    • 제4권1호
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    • pp.64-70
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    • 2015
  • This paper proposes fluorescent electronic ballast with high power factor and low line input current harmonics. The system performance can be improved by a charged pump circuit. Details of design and circuit operation are described. The proposed electronic ballast is modified from single-stage half bridge class D electronic ballast by adding capacitor parallel with each power switch and setting the circuit parameter to operate under class DE inverter condition. By using this proposed method the DC bus voltage can be reduced around by 50% compare with conventional class D inverter circuit. Because the power switches are operated at zero voltage switching condition and low dv/dt of class DE switching. The experimental results show that the proper frequency of the prototype is around 50 kHz with input power factor of 0.982, $THD_i$ 10.2% at full load and efficiency of more than 90%.

A New Control Scheme for a Class-D Inverter with Induction Heating Jar Application by Constant Switching Frequency

  • Choi Won-Suk;Park Nam-Ju;Lee Dong-Yun;Hyun Dong-Seok
    • Journal of Power Electronics
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    • 제5권4호
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    • pp.272-281
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    • 2005
  • In this paper, a simple power control scheme for a constant frequency Class-D inverter with a variable duty cycle is proposed. It is more suitable and acceptable for high- frequency induction heating (IH) jar applications. The proposed control scheme has the advantages of not only wide power regulation range but also ease of control output power. Also it can achieve a stable and efficient Zero-Voltage-Switching (ZVS) in a whole load range. The control principles of the proposed method are described in detail and its validity is verified through simulated and experimental results on 42.8kHz IGBT for induction heating rated on 1.6kW with constant frequency variable power.

6.78MHz Capacitive Coupling Wireless Power Transfer System

  • Yi, Kang Hyun
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.987-993
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    • 2015
  • Wireless power transfer technologies typically include inductive coupling, magnetic resonance, and capacitive coupling methods. Among these methods, capacitive coupling wireless power transfer (CCWPT) has been studied to overcome the drawbacks of other approaches. CCWPT has many advantages such as having a simple structure, low standing power loss, reduced electromagnetic interference (EMI) and the ability to transfer power through metal barriers. In this paper, the CCWPT system with 6.78MHz class D inverter is proposed and analyzed. The proposed system consists of a 6.78MHz class D inverter with a LC low pass filter, capacitor between a transmitter and a receiver, and impedance transformers. The system is verified with a prototype for charging mobile devices.

Phase Locked Loop based Pulse Density Modulation Scheme for the Power Control of Induction Heating Applications

  • Nagarajan, Booma;Sathi, Rama Reddy
    • Journal of Power Electronics
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    • 제15권1호
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    • pp.65-77
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    • 2015
  • Resonant converters are well suited for induction heating (IH) applications due to their advantages such as efficiency and power density. The control systems of these appliances should provide smooth and wide power control with fewer losses. In this paper, a simple phase locked loop (PLL) based variable duty cycle (VDC) pulse density modulation (PDM) power control scheme for use in class-D inverters for IH loads is proposed. This VDC PDM control method provides a wide power control range. This control scheme also achieves stable and efficient Zero-Voltage-Switching (ZVS) operation over a wide load range. Analysis and modeling of an IH load is done to perform a time domain simulation. The design and output power analysis of a class-D inverter are done for both the conventional pulse width modulation (PWM) and the proposed PLL based VDC PDM methods. The control principles of the proposed method are described in detail. The validity of the proposed control scheme is verified through MATLAB simulations. The PLL loop maintains operation closer to the resonant frequency irrespective of variations in the load parameters. The proposed control scheme provides a linear output power variation to simplify the control logic. A prototype of the class-D inverter system is implemented to validate the simulation results.

Implementation of Zero-Ripple Line Current Induction Cooker using Class-D Current-Source Resonant Inverter with Parallel-Load Network Parameters under Large-Signal Excitation

  • Ekkaravarodome, Chainarin;Thounthong, Phatiphat;Jirasereeamornkul, Kamon
    • Journal of Electrical Engineering and Technology
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    • 제13권3호
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    • pp.1251-1264
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    • 2018
  • The systematic and effective design method of a Class-D current-source resonant inverter for use in an induction cooker with zero-ripple line current is presented. The design procedure is based on the principle of the Class-D current-source resonant inverter with a simplified load network model that is a parallel equivalent circuit. An induction load characterization is obtained from a large-signal excitation test-bench based on parallel load network, which is the key to an accurate design for the induction cooker system. Accordingly, the proposed scheme provides a systematic, precise, and feasible solution than the existing design method based on series-parallel load network under low-signal excitation. Moreover, a zero-ripple condition of utility-line input current is naturally preserved without any extra circuit or control. Meanwhile, a differential-mode input electromagnetic interference (EMI) filter can be eliminated, high power quality in utility-line can be obtained, and a standard-recovery diode of bridge-rectifier can be employed. The step-by-step design procedure explained with design example. The devices stress and power loss analysis of induction cooker with a parallel load network under large-signal excitation are described. A 2,500-W laboratory prototype was developed for $220-V_{rms}/50-Hz$ utility-line to verify the theoretical analysis. An efficiency of the prototype is 96% at full load.

IH-Jar용 Class-D 인버터의 새로운 PWM 출력 제어 기법 (A New PWM Power Control Scheme of Class-D Inverter for Induction Heating Jar Application.)

  • 최원석;박남주;이동윤;현동석
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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    • pp.519-523
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    • 2004
  • In this paper, a simple power control scheme of Class-D inverter, which is varied duty cycle of fixed frequency to desired output power. It is more suitable and acceptable for high-frequency induction heating (IH) jar applications. The proposed control scheme has the advantages of not only wide power regulation range but also ease to control output power. Also it can achieve the stable and efficient Zero-Voltage-Switching (ZVS) in whole load range. The control principles of proposed method are described in detail and its validity is verified trough simulations results on 38.5kHz IGBT for induction heating rated on 1.6kW with constant frequency variable power.

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LS-ZVS-LSTC를 이용한 D급 SEPP형 고주파 공진 인버터에 관한 연구 (A Study on the High Frequency Resonant Inverter of Class D SEPP type using LS-ZVS-LSTC)

  • 박동한;최병주;김종해
    • 전기전자학회논문지
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    • 제24권1호
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    • pp.260-268
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    • 2020
  • 본 논문에서는 스위칭 시 발생하는 턴-온 및 턴-오프 손실을 줄일 수 있는 LS-ZVS-LSTC를 이용한 D급 SEPP형 고주파 공진 인버터에 대해서 나타내고 있다. 본 논문에서 제안한 LS-ZVS-LSTC를 이용한 고주파 공진 회로의 해석은 무차원화 파라메타를 도입하여 범용성 있게 기술하였다. 또한 제안 인버터의 운전 특성은 무파원화 제어 주파수(μ), 무차원화 부하시정수(τ), 결합계수(κ) 등의 제어 파라메타를 이용하여 특성 평가를 수행하였다. 특성 평가를 통한 특성치를 토대로 1.8[kW] D급 SEPP형 LS-ZVS-LSTC 고주파 인버터 설계 기법의 일예를 제시하였으며, 이론 해석의 정당성은 실험을 통해 입증하였다.