• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.2
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• pp.183-188
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• 2014

In this paper, the propagation effect of power supply uncertainty on the output of class-F power amplifier has been estimated. Also, a 1.9 GHz, 10 watt class-F power amplifier was measured to verify the estimation and to find the optimal biasing point. By approximating the propagation theory of uncertainties, the propagation effect of bias uncertainty was mathmatically calculated. As a result, the DC biases have propagated uncertainties of 15~70 mW. However, at the optimized bias point, the uncertainty in the output power could be dropped less than 15 mW while the output power has dropped by 0.37 dB.

• Journal of electromagnetic engineering and science
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• v.9 no.3
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• pp.152-158
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• 2009

We have developed a novel digital feedback predistortion(DFBPD) linearization based on RF feedback PD for the wide bandwidth modulated signals. The wideband PD operation is carried out by combining the DFBPD and memory lookup table(LUT). To experimentally demonstrate the linearization performance of the proposed PD technique for wideband signal, a class-AB amplifier using an LDMOSFET MRF6S23140 with 140-W peak envelope power is employed at 2.345 GHz. For a forward-link 2FA wideband code-division multiple-access signal with 10 MHz carrier spacing, the proposed DFBPD with memory LUT delivers the adjacent channel leakage ratio at an 10 MHz offset of -56.8 dBc, while those of the amplifier with and without DFBPD are -43.2 dBc and -41.9 dBc, respectively, at an average output power of 40 dBm. The experimental result shows that the new DFBPD with memory LUT provides a good linearization performance for the signal with wide bandwidth.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.78-84
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• 2009

This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LOMaS. From the measured results, at an average output power of 33 dBm(lO-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ${\pm}$5 MHz offset) of below -45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage($V_{DD}$) of 18 V. This compared an ACLR of -36.7 dEc and drain efficiency of 14.1 % at the $V_{DD}$ of 28 V for a PA without APD.

• The Journal of the Acoustical Society of Korea
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• v.36 no.3
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• pp.179-185
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• 2017

The problem that occurred in the design/fabrication/testing of the wideband transmitting power amplifier for an embedded active SONAR (Sound Navigation and Ranging) system operating underwater was analyzed and the solution of the problem was proposed in this paper. Wideband acoustic SONAR systems had been developed in order to improve the underwater detection performance. The underwater acoustic transmission system had been also developed to achieve the wideband SONAR system. In this paper, the wideband acoustic transmission signal was generated using a 2 Level sawtooth type Class D PWM (Pulse Width Modulation) which was not complicated to implement. When the sonar signals having two or more frequencies were simultaneously generated, parasitic frequencies were added to the original signals by integer multiples of the frequency difference of the original signal. To cope with this problem, we proposed a way to remove the parasitic frequency from the source signal through modeling and simulation of the implemented power amplifier and PWM control hardware using MATLAB and Simulink.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.8
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• pp.945-952
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• 2015

Power amplification device which is matched to $50{\Omega}$ in order to achieve a high efficiency of a power amplifier using a GaN power amplification device, since there is a limit of application frequency bands, output power, efficiency characteristics selection, in this study based on the measurement data through the source/load-pull test, high output power and to extract quantitative input and output impedance that matches the design objectives of high output power, high efficiency, an implementation of the high efficiency power amplifier. Implemented power amplifier is shows 25watt(44dBm), PAE of 66-76% characteristics in the frequency band of 2.7-3.1 GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.56-61
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• 2010

In this paper, high efficient power amplifier with dual band has been realized. Dual band power amplifier have used modify stub matching for single FET, center frequency 2.14GHz and 5.2GHz respectively. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Because the control of the all harmonic components is very difficult m dual-band, we have managed only the second- and third-harmonics to obtain the high efficiency with the CRLH TL in dual-band. Dual-band characteristics in the output has to balance. Two operating frequencies are chosen at 2.14 GHz and 5.2 GHz in this work. The measured results show that the output power of 28.56 dBm and 29 dBm was obtained at 2.14 GHz and 5.2 GHz, respectively. At this point, we have obtained the power-added efficiency (PAE) of 65.824 % and 69.86 % at two operation frequencies, respectively.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.42 no.3
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• pp.7-12
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• 2005

In this paper, we used class D amplification circuit to improve the decline of error rate caused by low impedance in the Power Line Communication. We manufactured voltage drive circuit and current drive circuit that are driven circuit of power line modem on the present and made a comparison experiment with drivel circuit that uses class D amplifier proposed in this paper. As a result of Experiment, We showed that it has great superiority over other existing drive circuits at rapid impedance change in power line channel.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.5
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• pp.335-342
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• 2022

In this paper, a single-bit 3rd-order feedforward delta sigma modulator is proposed for audio applications. The proposed modulator is based on a class-C inverter for low voltage and power applications. For the high-precision requirement, the class-C inverter with regulated cascode structure increases its DC gain and acts as a low-voltage subthreshold amplifier. The proposed Class-C inverter-based modulator is designed and simulated in 180-nm CMOS process. With no performance loss and a low supply voltage compatibility, the proposed class-C inverter-based switched-capacitor modulator achieves high power efficiency. This design achieves an signal-to-noise-and-distortion ratio (SNDR) of 93.9 dB, an signal-to-noise ratio (SNR) of 108 dB, an spurious-free dynamic range (SFDR) of 102 dB, and a dynamic range (DR) of 102 dB at a signal bandwidth of 20 kHz and a sampling frequency of 4 MHz, while only using 280 μW of power consumption from a 0.8-V power supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.10
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• pp.61-66
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• 2007

A gain enhancement rail-to-rail buffer amplifier for liquid crystal display (LCD) source driver is proposed. An op-amp with extremely high gain is needed to decrease the offset voltage of the buffer amplifier. Cascoded floating current source and class-AB control block in the op-amp achieve a high voltage gain by reducing the channel length modulation effect in high voltage technologies. HSPICE simulation in $1\;{\mu}V$ 15 V CMOS process demonstrates that voltage gain is increased by 30 dB. The offset voltage is improved from 6.84 mV to $400\;{\mu}V$. Proposed op-amp is fabricated in an LCD source driver IC and overall system offset voltage is decreased by 2 mV.

• Proceedings of the KAIS Fall Conference
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• 2002.11a
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• pp.197-200
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• 2002

본 논문에서는 IMT-2000용 AB급 대전력 증폭기를 설계 및 제작하였다. 전력증폭기의 주파수 대역은 IMT-2000용 순방향 주파수인 2110MHz-2170MHz에서 AB급으로 동작하도록 하였고, 고효율성과 우수한 선형성 소자인 LDMOSFET를 사용하였다. 설계 특성에 맞는 최적부하를 찾아 마이크로 스트립 회로로 입력 및 출력 정합 회로를 구현하였다 임피던스 정합 방법으로는 소자를 실제 측정상태에서 입력단과 출력단에 튜너를 삽입하고 기본 주파수에서 최대 출력상태를 만족하는 임피던스를 튜너로 구현한 후, 튜너를 제거하고 튜너의 입력 임피던스를 Network Analyzer로 측정하여 최적 부하 임피던스를 추출하는 로드풀 방법을 사용하였다. 대전력 증폭기의 측정결과로는 2-톤 인가시 40.57dBm의 출력결과를 얻을 수 있었고 30.61dBc의 상호 혼변조 특성을 확인하였으며, 원신호의 하모닉(Hamonic) 주파수 성분과는 21.46dBc의 차이를 보였다.