• 대한전자공학회논문지
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• 제10권2호
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• pp.7-15
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• 1973

전압제어형 부성저항소자를 사용하여 말티바이브레이터를 설계할 경우의 안정점 설정과 회로동작 안정성에 관하여 논한다. 즉 직류적으로 한개 혹은 두개의 안정점을 가지도록 설계된 회로가 일시적 흑은 영구적 발진을 일으키는 현상에 대하여 아나로그 계산기의 모의에 의하여 해석하고, 실험적으로 확인함으로써, 부성저항스윗칭회로 설계상의 유의점을 제시한다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권4호
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• pp.477-483
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• 2015

The k-Winners-Take-All (kWTA) is an operation to find the largest k (>1) inputs among N inputs. Parallel search algorithm of kWTA for digital inputs is not invented yet, so most of digital kWTA architectures have O(N) time complexity. A parallel search algorithm for digital kWTA operation and the circuits for its VLSI implementation are presented in this paper. The proposed kWTA architecture can compare all inputs simultaneously in parallel. The time complexity of the new architecture is O(logN), so that it is scalable to a large number of digital data. The high-speed kWTA operation and its O(logN) dependency of the new architecture are verified by simulations. It takes 290 ns in searching for 5 winners among 1024 of 32 bit data, which is more than thousands of times faster than existing digital kWTA circuits, as well as existing analog kWTA circuits.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.973-974
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• 2008

Optically transparent and flexible electronic circuits and displays are attractive for next-generation visual technologies, including windshield displays, head-mounted displays, and transparent screen monitors. Here we report on the fabrication of transparent transistors and circuits based on the combination of nanoscopic dielectrics and organic, inorganic, or hybrid semiconductors. Furthermore, the first demonstration of a transparent and flexible AMOLED display driven solely by $In_2O_3$ nanowire transistors (NWTs) is reported. The display region exhibits an optical transmittance of ~35% and a green peak luminance of ${\sim}300\;cd/m^2$. These results indicate that NWT-based drive circuits are attractive for fully transparent display technologies.

• Journal of information and communication convergence engineering
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• 제15권4호
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• pp.237-243
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• 2017

This paper presents an analysis of the electromagnetic interference of a heterogeneous power bus where electromagnetic bandgap (EBG) cells are irregularly arranged. To mitigate electrical-noise coupling between high-speed circuits, the EBG structure is placed between parallel plate waveguide (PPW)-based power buses on which the noise source and victim circuits are mounted. We examine a noise suppression characteristic of the heterogeneous power bus in terms of scattering parameters. The characteristics of the dispersion and scattering parameters are compared in the sensitivity analysis of the EBG structure. Electric field distributions at significant frequencies are thoroughly examined using electromagnetic simulation based on a finite element method (FEM). The noise suppression characteristics of the heterogeneous power bus are demonstrated experimentally. The heterogeneous power bus achieves significant reduction of electrical-noise coupling compared to the homogeneous power buses that are adopted in conventional high-speed circuit design. In addition, the measurements show good agreement with the FEM simulation results.

• 한국통신학회논문지
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• 제21권5호
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• pp.1221-1229
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• 1996

This paper proposes a heuristic algorithm for low power implementation of combinational circuits. Selecting an input variable for a given function, the proposed algorithm performs Shannon exansion with respect to the variable to reduce the number of gates in the subcircuit realizing the coffactor function, reducting the power dissipation of the implemented circuit. experimental results for the MCNC benchmarks show that the proposed algorithm is effective by generating the circuits consuming the power 48.9% less on the average, when compared to the previous algorithm based on precomputation logic.

• 한국통신학회논문지
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• 제21권11호
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• pp.2966-2977
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• 1996

As design of very large circuits is made possible by rapid development of VLSI technologies, efficient fault simulation is needed. Ingeneral, fault simulation requires many computer resources. As general-purpose multiprocessors become more common and affordable, these seem to be an attractive and effective alternative for fault simulation. Efficient fault simulation of synchronous sequential circuits has been reported to be attainably by using a linear iterative array model for such a circuit, and combining parallel fault simulation with russogate fault simulation. Such fault simulation algorithm is parallelized on a general-purpose multiprocessor with shard memory for acceleration of fault simulation. Through the experimenal study, the effect of the number of processors on speed-up of simulation, processor utilization, and the effect of multiprocessor hardware on simulation performance are studied. Some results for experiments with benchmark circuits are shown.

• E2M - 전기 전자와 첨단 소재
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• 제8권3호
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• pp.254-260
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• 1995

A method is described for the design and fabrication of the sensor interface circuits on the Clark electrodes for the dissolved oxygen(DO). The discussion includes a method for the +5 V single-supply driving for the sensor circuits, which has low power comsumption for the front-end electronics. DO probe under test is composed of the Clark electrode with silver anode, gold cathode and the electrolyte of half saturated KCI solution and the FEP teflon memtrance for the oxygen penetration. Typical polarograms for the DO probes by using this sensor circuit reveals high accuracy over 99% of the I to V conversion. Partial pressure of oxygen obtained from the polarograms are well suited to the results calculated. It is expected that the proposed sensor circuits can be utilized into the customized IC for the battery-driven small-size DO meters.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.161-161
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• 2010

In order to achieve low power consumption and the uniform power spectrum of LED BLU (Back Light Unit) system, new circuits with a 2 stage L-C (Inductor-Capacitor) coupler have been proposed. From the simulation results based on our proposed model, the ripple power of the L-C regulation-embedded BLU circuit shows a dramatic reduction by more than 89.3% as compared to the normal BLU (without L-C circuits). This indicates that the proposed circuit is very promising for the realization of high-efficiency BLU circuits.

• 전기학회논문지P
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• 제53권1호
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• pp.22-27
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• 2004

BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. In BiCMOS circuits, transistor stuck-open faults exhibit delay faults in addition to sequential behavior. In this paper, proposes a method for efficiently generating test pattern which detect stuck-open in BiCMOS circuits. In proposed method, BiCMOS circuit is divided into pull-up part and pull-down part, using structural property of BiCMOS circuit, and we generate test pattern using set theory for efficiently detecting faults which occured each divided blocks.

• 전자공학회논문지 IE
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• 제49권2호
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• pp.18-23
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• 2012

변환기의 해석 및 정합설계에 있어서 측정되어진 데이터로 부터 그 변환기의 전기, 기계, 음향적인 특성변수를 추출하는 기술의 확보는 필수적이다. 이와 관련한 기존의 방법은 단일 공진을 갖는 변환기를 위한 것이 많았다. 본 연구에서는 두 개의 공진점을 갖는 광대역 전기음향변환기의 정확한 특성변수 추출을 위하여 Levy Method 반복적으로 사용하여 그 오차를 최소화하는 알고리듬을 개발하였다.