• Title/Summary/Keyword: Circuit Resistance

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High Efficiency Buck-Converter with Short Circuit Protection

  • Cho, Han-Hee;Park, Kyeong-Hyeon;Cho, Sang-Woon;Koo, Yong-Seo
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.6
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    • pp.425-429
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    • 2014
  • This paper proposes a DC-DC Buck-Converter with DT-CMOS (Dynamic Threshold-voltage MOSFET) Switch. The proposed circuit was evaluated and compared with a CMOS switch by both the circuit and device simulations. The DT-CMOS switch reduced the output ripple and the conduction loss through a low on-resistance. Overall, the proposed circuit showed excellent performance efficiency compared to the converter with conventional CMOS switch. The proposed circuit has switching frequency of 1.2MHz, 3.3V input voltage, 2.5V output voltage, and maximum current of 100mA. In addition, this paper proposes a SCP (Short Circuit Protection) circuit to ensure reliability.

A Study on the Automatic Test Strategy of the Electronic Circuit Board Using Artificial Intelligence (인공지능기법을 이용한 전자회로보오드의 자동검사전략에 대한 연구)

  • 고윤석
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.52 no.12
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    • pp.671-678
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    • 2003
  • This paper proposes an expert system to generate automatically the test table of test system which can highly enhance the quality and productivity of product by inspecting quickly and accurately the defect device on the electronic circuit board tested. The expert system identifies accurately the tested components and the circuit patterns by tracing automatically the connectivity of circuit from electronic circuit database. And it generates automatically the test table to detect accurately the missing components, the misplaced components, and the wrong components for analog components such as resistance, coil, condenser, diode, and transistor, based on the experience knowledge of veteran expert. It is implemented in C computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. And, the validity of the builded expert system is proved by simulating for a typical electronic board model.

Current Distribution Factor Based Fault Location Algorithms for Double-circuit Transmission Lines (전류분배계수를 사용하는 병행 2회선 송전선로 고장점 표정 알고리즘)

  • Ahn, Yong-Jin;Kang, Sang-Hee;Choi, Myeon-Song;Lee, Seung-Jae
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.50 no.3
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    • pp.146-152
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    • 2001
  • This paper describes an accurate fault location algorithm based on sequence current distribution factors for a double-circuit transmission system. The proposed method uses the voltage and current collected at only the local end of a single-circuit. This method is virtually independent of the fault resistance and the mutual coupling effect caused by the zero-sequence current of the adjacent parallel circuit and insensitive to the variation of source impedance. The fault distance is determined by solving the forth-order KVL(Kirchhoff's Voltage Law) based distance equation. The zero-sequence current of adjacent circuit is estimated by using a zero-sequence current distribution factor and the zero-sequence current of the self-circuit. Thousands of fault simulation by EMTP have proved the accuracy and effectiveness of the proposed algorithm.

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Research of an On-Line Measurement Method for High-power IGBT Collector Current

  • Hu, Liangdeng;Sun, Chi;Zhao, Zhihua
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.362-373
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    • 2016
  • The on-line measurement of high-power IGBT collector current is important for the hierarchical control and short-circuit and overcurrent protection of its driver and the sensorless control of the converter. The conventional on-line measurement methods for IGBT collector current are not suitable for engineering measurement due to their large-size, high-cost, low-efficiency sensors, current transformers or dividers, etc. Based on the gate driver, this paper has proposed a current measuring circuit for IGBT collector current. The circuit is used to conduct non-intervention on-line measurement of IGBT collector current by detecting the voltage drop of the IGBT power emitter and the auxiliary emitter terminals. A theoretical analysis verifies the feasibility of this circuit. The circuit adopts an operational amplifier for impedance isolation to prevent the measuring circuit from affecting the dynamic performance of the IGBT. Due to using the scheme for integration first and amplification afterwards, the difficult problem of achieving high accuracy in the transient-state and on-state measurement of the voltage between the terminals of IGBT power emitter and the auxiliary emitter (uEe) has been solved. This is impossible for a conventional detector. On this basis, the adoption of a two-stage operational amplifier can better meet the requirements of high bandwidth measurement under the conditions of a small signal with a large gain. Finally, various experiments have been carried out under the conditions of several typical loads (resistance-inductance load, resistance load and inductance load), different IGBT junction temperatures, soft short-circuits and hard short-circuits for the on-line measurement of IGBT collector current. This is aided by the capacitor voltage which is the integration result of the voltage uEe. The results show that the proposed method of measuring IGBT collector current is feasible and effective.

Adaptive Learning Circuit For Applying Neural Network (뉴럴 네트워크의 적용을 위한 적응형 학습회로)

  • Lee, Kook-Pyo;Pyo, Chang-Soo;Koh, Si-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.3
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    • pp.534-540
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    • 2008
  • The adaptive learning circuit is designed on the basis of modeling of MFSFET (Metal-Ferroelectric-Semiconductor FET) and the numerical results is analyzed. The output frequency of the adaptive learning circuit is inversely proportional to the source-drain resistance of MFSFET and the capacitance of the circuit. The saturated drain current with input pulse number is analogous to the ferroelectric polarization reversal. It indicates that the ferroelectric polarization plays an important role in the drain current control of MFSFET. The output frequency modulation of the adaptive learning circuit is investigated by analyzing the source-drain resistance of MFSFET as functions of input pulse numbers in the adaptive learning circuit and the dimensionality factor of the ferroelectric thin film. From the results, adaptive learning characteristics which means a gradual frequency change of output pulse with the progress of input pulse, are confirmed. Consequently it is shown that our circuit can be used effectively in the neuron synapses of neural networks.

Systematic Approach of Internal Parameters for Equivalent Electrical-Circuit Modeling(EECM) of a Li4Ti5O12(LTO) cell (Li4Ti5O12(LTO) 배터리 등가회로 모델링을 위한 내부 파라미터 체계적 해석)

  • Lee, Pyeong-Yeon;Yoon, Chang-O;Park, Jin-Hyeong;Kim, Jonghoon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.23 no.3
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    • pp.174-181
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    • 2018
  • This study introduces a systematic approach to selecting the internal parameters applied to the equivalent electrical-circuit model (EECM) of a lithium titanium oxide ($Li_4Ti_5O_{12}$; LTO) rechargeable cell. Based on the dynamic characteristic of the cell, a simplified EECM consisting of an open-circuit voltage (OCV), an ohmic resistance, and an RC ladder is fabricated. To select the internal parameters of a simplified EECM, experiments on discharge capacity, OCV, and discharge/charge resistances are performed using hybrid pulse power characterization and direct current internal resistance (DCIR) measurements over the full state-of-charge (SOC) range. The experimental results of the LTO rechargeable cell highlight the importance of correct selection of internal parameters that can reduce EECM errors. This study clearly provides experimental procedures, internal parameters results, and EECM guidelines for adaptive control-based SOC estimation for LTO rechargeable cells.

Electrical Conduction Mechanism and Equivalent Circuit Analysis in $Alq_3$ based Organic Light Emitting Diode ($Alq_3$에 기초한 유기 발광 소자에서 전기전도특성과 등가회로분석)

  • Chung, Dong-Hoe;Shin, Cheol-Gi;Lee, Dong-Gyu;Lee, Joon-Ung;Lee, Suk-Jae;Lee, Won-Jae;Jang, Kyung-Wook;Kim, Tae-Wan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.103-106
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    • 2004
  • We have studied a conduction mechanism and equivalent circuit analysis in $Alq_3$ based Organic Light Emitting Diode. The conduction mechanism in organic light emitting diode can be classified into three regions; ohmic region, space-charge-limited current (SCLC) region and trap-charge-limited current (TCLC) region depending on the region of applied voltage. Equivalent circuit model of organic light emitting diode can be established using a parallel combination of resistance $R_p$ and capacitance $C_p$ with a small series resistance $R_s$.

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Three Dimensional Architecture of Multiplexing Data Registration Integrated Circuit for Flat Panel Display

  • Tseng, Fan-Gang;Liou, Jian-Chiun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1293-1296
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    • 2008
  • As Flat Panel Display become large in format, the data and gate lines turn into longer, parasitic capacitance and resistance increase, and the display signal is delayed. Three dimensional architecture of multiplexing data registration integrated circuit method is used that divides the data line into several blocks and provides the advantages of high accuracy, rapid selection, and reasonable switching speed.

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Sinusoidal Oscillator Using Planer SCR (Planer SCR에 의한 정자파 발진기)

  • 박병철
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.11 no.2
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    • pp.40-45
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    • 1974
  • It is indicated that in SCR the anode current can be controlled by ajusting the gate voltage when the magnitude of anode current lies in the range of 10-2 to 10-3 Amperes. This fact is applied to make a simple sinusoidal oscillator circuit which has the negative resistance characteristics in its gate circuit by inserting a proper resistor into its cathode circuit.

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Study on DPA countermeasure method using self-timed circuit techniques (비동기회로 설계기술을 이용한 DPA(차분전력분석공격) 방어방법에 관한 연구)

  • 이동욱;이동익
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.879-882
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    • 2003
  • Differential Power Analysis(DPA) is powerful attack method for smart card. Self-timed circuit has several advantages resisting to DPA. In that reason, DPA countermeasure using self-timed circuit is thought as one of good solution for DPA prevention. In this paper, we examine what self-timed features are good against DPA, and how much we can get benefit from it. Also we test several self-timed circuit implementation style in order to compare DPA resistance factor. Simulation results show that self-timed circuit is more resistant to DPA than conventional synchronous circuit, and can be used for designing cryptographic hardware for smart-card.

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