• Journal of Power Electronics
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• v.11 no.2
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• pp.237-243
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• 2011

Lithium batteries are widely used in mobile electronic devices due to their higher voltage and energy density, lighter weight and longer life cycle when compared to other secondary batteries. In particular, a high demand for lithium batteries is expected for electric cars. In the case of the lithium batteries used in electric cars, driving distance must be calculated accurately and discharging should not be done below a level that makes it impossible to crank. Therefore, accurate information on the state-of-charge (SOC) becomes an essential element for reliable driving. In this paper, a novel method for estimating the SOC of lithium polymer batteries using AC impedance is proposed. In the proposed method, the parameters are extracted by fitting the measured impedance spectrum on an equivalent impedance model and the variation in the parameter values at each SOC is used to estimate the SOC. Also to shorten the long length of time required for the measurement of the impedance spectrum, a novel method is proposed that can extract the equivalent impedance model parameters of lithium polymer batteries with the impedance measured at only two specific frequencies. Experiments are conducted on lithium polymer batteries, with similar capacities, made by different manufacturers to prove the validity of the proposed method.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.9
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• pp.893-900
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• 2016

Output response for prototype system is analyzed according to the pole locations and the damping ratio changes. The system modeling is constructed for RLC-circuit and the output response is analyzed for both a unit-step and a sinusoidal input. The survey is conducted to estimate the understanding ability on the automatic control. A high understanding ability is shown up in analysing the transfer functions of control system. And improvement is manifest in the ability to understand the output response according to the parameter changes. But some difficulty is revealed in acquiring the output responses in time domain.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.2
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• pp.255-265
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• 1999

Recently the necessity of MMIC is increasing because clock frequency goes up by digital data transmission of Gbps class being demanded and the density of circuits gets high for the purpose of lightening and miniaturizing system, owing to the development of ultra high speed. When massing lines in a MMIC and super high speed integrated circuit cause the crosstalk and dispersion of signal, a digital signal is distorted and EMI is occurred. To solve this problems, It is necessary to analyze the equivalent parameters of transmission lines. This paper represent the results of the equivalent parameters of transmission lines for single and hi-level structure by using moment method.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1460-1462
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• 1994

BiCMOS is the newly developed technology that integrates both CMOS and bipolar structures on the same integrated circuit. Improved performance can be obtained from combining the advantages of high density and low power in CMOS with the speed and current capibility advantages by bipolar. However, the major drawbacks to BiCMOS are high cost, long fabrication time and difficulty of merging CMOS with bipolar without degrading of device Performance because CMOS and bipolar share same process step. In this paper, N-Well CMOS oriented BiCMOS process and optimization of device performance are studied when N-Well links CMOS with bipolar process step by 2D process and 3D Device simulation. From the simulation, Constriction of linking process step has been understood and provided to give the method of choosing BiCMOS for various analog design request.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2004.11a
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• pp.237-240
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• 2004

Sulfur Hexafluoride, SF6 is widely used for leak detection and as a gaseous dielectric in transformers, condensers and circuit breakers. SF6 gas is also effective as a cleanser in the semiconductor industry. This paper presents a numerical study of the sealing force of disk type seal in SF6 gas safety valve. The sealing force on the disk seal is analyzed by the FEM method based on the Taguch's experimental design technique. Disk seals in SF6 gas safety valve are designed with 9 design models based on 3 different contact length, compressive ratio and gas pressure. The calculated results of Cauchy stress and strain showed that the sealing characteristics of Teflon PTFE is more effective compared to that of FKM(Viton), which is related to the stiffness of the materials. And also, the contact length of the disk seal is important design parameter for sealing the SF6 gas leakage in the safety valve.

• Journal of Applied Reliability
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• v.18 no.3
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• pp.229-239
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• 2018

Purpose: There is a difficulty in Environmental Stress Screening (ESS) test design for weapon system's electrical/electronic components/products in small and medium-sized enterprises. To overcome this difficulty, I propose an easy ESS test design approach algorithm that is optimized with only one environment tolerance design information parameter (${\Delta}T$). Methods: To propose the mass production weapon system ESS test design for cost-effective optimization, I define an optimum cost-effective mathematical model ESS test algorithm model based on modified MIL-HDBK-344, MIL-HDBK-2164 and DTIC Technical Report 2477. Results: I clearly confirmed and obtained the quantitative data of ESS effectiveness and cost optimization along our ESS test design algorithm through the practical case. I will expect that proposed ESS test method is used for ESS process improvement activity and cost cutting of mass production weapon system manufacturing cost in small and medium-sized enterprises. Conclusion: In order to compare the effectiveness of the proposed algorithm, I compared the effectiveness of the existing ESS test and the proposed algorithm ESS test based on the existing weapon system circuit card assembly for signal processing. As a result of the comparison, it was confirmed that the test time was reduced from 573.0 minutes to 517.2minutes (9.74% less than existing test time).

• 한국연소학회:학술대회논문집
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• 2001.06a
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• pp.23-30
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• 2001

Bomb calorimeter was developed for measuring the calorific value of combustible matter such as wastes. The calorimeter consist of bomb, stirred-water type bucket, thermometer and ignition circuit. Operation and performance of the calorimeter have been tested experimentally. In the present study, calorific values of light oil, lamp oil, benzoic acid, ethyl alcohol and methyl alcohol is measured using the bomb calorimeter. Mass of the sample is fixed at 19, and oxygen pressure in the bomb is used as an experimental parameter. Sample in the oxygen bomb is burned with electrically heated Ni-Cr wire of 100mm in length, and temperature of water in the bucket become increased by $2{\sim}5^{\circ}C$ during about 30min. Calorific value of the sample is calculated with the temperature difference of water. Combustion tests, such as the record of temperature history and the inspection of remnants, are performed at 6, 8 and 10 atm of the oxygen pressure. From the test results, oxygen pressure in the bomb must be over 10atm for complete combustion.

• Transactions on Electrical and Electronic Materials
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• v.6 no.4
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• pp.159-163
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• 2005

We analyzed the fault current limiting characteristics of a flux-lock type $high-T_c$ super­conducting fault current limiter (HTSC-FCL) using series resonance between capacitor for series resonance and magnetic field coil which was installed in coil 3. The capacitor for the series resonance in the flux-lock type HTSC-FCL was inserted in series with the magnetic field coil to apply enough magnetic field into HTSC element, which resulted in higher resistance of HTSC element. However, the impedance of the flux lock type HTSC-FCL has started to decrease since the current of coil 3 exceeded one of coil 2 after a fault accident. The decrease in the impedance of the FCL causes the line current to increase and, if continues, the capacitor for the series resonance to be destructed. To avoid this operation, the flux-lock type HTSC-FCL requires an additional device such as fault current interrupter or control circuit for magnetic field. From the experimental results, we investigated the parameter range where the operation as mentioned above for the designed flux-lock type HTSC-FCL using series resonance occurred.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.1254-1257
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• 2004

This paper presents a built-in current sensor(BICS) that can detect defects in CMOS integrated circuits through current testing technique - Iddq test. Current test has recently been known to a complementary testing method because traditional voltage test cannot cover all kinds of bridging defects. So BICS is widely used for current testing. but there are some critical issues - a performance degradation, low speed test, area overhead, etc. The proposed BICS has a two operating mode- normal mode and test mode. Those methods minimize the performance degradation in normal mode. We also used a current-mode differential amplifier that has a input as a current, so we can realize higher speed current testing. Furthermore, only using 10 MOSFETS and 3 inverters, area overhead can be reduced by 6.9%. The circuit is verified by HSPICE simulation with 0.25 urn CMOS process parameter.

• Transactions on Electrical and Electronic Materials
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• v.11 no.3
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• pp.93-105
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• 2010

Complementary metal-oxide-semiconductor (CMOS) technology scaling has been a main key for continuous progress in silicon-based semiconductor industry over the past three decades. However, as the technology scaling enters nanometer regime, CMOS devices are facing many serious problems such as increased leakage currents, difficulty on increase of on-current, large parameter variations, low reliability and yield, increase in manufacturing cost, and etc. To sustain the historical improvements, various innovations in CMOS materials and device structures have been researched and introduced. In parallel with those researches, various new nanoelectronic devices, so called "Beyond CMOS Devices," are actively being investigated and researched to supplement or possibly replace ultimately scaled conventional CMOS devices. While those nanoelectronic devices offer ultra-high density system integration, they are still in a premature stage having many critical issues such as high variations and deteriorated reliability. The practical realization of those promising technologies requires extensive researches from device to system architecture level. In this paper, the current researches and challenges on nanoelectronics are reviewed and critical tasks are summarized from device level to circuit design/CAD domain to better prepare for the forthcoming technologies.