• Title/Summary/Keyword: Circuit

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A Study on automatic optimization of cooling circuit design in injection mold (사출금형 냉각회로의 최적설계자동화에 관한 연구)

  • Chang, H.K.;Jung, H.W.;Lee, Y.J.;Rhee, B.O.
    • Proceedings of the Korean Society for Technology of Plasticity Conference
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    • 2007.10a
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    • pp.262-265
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    • 2007
  • Cooling circuit of injection mold affects part quality and cycle time of injection molding process. Examination on mold cooling circuit is usually omitted in part design stage because cooling circuit is designed in the mold design stage. It is desirable to examine mold cooling circuit with respect to part quality in the part design stage. In order to make the examination process convenient and fast, cooling circuit design should be automated without intervention of skilled designer. In this study, optimization of cooling circuit design is automated with commercial softwares; Visual DOC and Moldflow MPI. Effect of initial value for optimization is examined for the optimization result.

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Design of a High-Dimensional Discrete-Time Chaos Circuit with Array Structure

  • Eguchi, Kei;Ueno, Fumio;Tabata, Toru;Zhu, Hongbing;Maruyama, Yuuki
    • Proceedings of the IEEK Conference
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    • 2000.07a
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    • pp.211-214
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    • 2000
  • In this paper, a discrete-time S-dimensional chaos circuit (S = 1,2,3,4,...) with array structure is proposed. By employing array structure which consists of 1-dimensional chaos circuits, the proposed circuit can achieve long working-life. This feature is favorable to exploit as a building block of chaos application systems to get into home electric appliances. Further more, the proposed circuit synthesized using switched-current (SI) techniques is suitable for integration. Concerning the proposed circuit, SPICE simulations are performed. SPICE simulations showed that the proposed circuit can generate the chaotic signals in spite of the fault of the building blocks of the proposed circuit. The proposed circuit is integrable by a standard BiCMOS technology.

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Analysis and optimization of Wiel-Dobke synthetic testing circuit parameters (Weil-Dobke 합성단락 시험회로의 Parameter 분석과 최적화)

  • Kim, Maeng-Hyun;Rhyou, Hyeong-Kee;Park, Jong-Wha;Koh, Hee-Seog
    • Proceedings of the KIEE Conference
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    • 1995.07b
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    • pp.623-627
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    • 1995
  • This paper describes analysis and optimization of Weil-Dobke synthetic testing circuit parameters, which is efficient and economical test method in high capacity AC circuit breaker. In this paper, analysis of synthetic short-circuit test circuit parameter proposed nondimensional factor that is reciprocal comparison value of circuit parameter and is not related to rated of circuit breaker, in particular, this study induce minimization of required energy of critical TRV generation specified in IEC 56 standards and present optimal design of synthetic short circuit testing facilities.

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An Implementation of Multiple Access Memory System for High Speed Image Processing (고속 영상처리를 위한 다중접근 기억장치의 구현)

  • 김길윤;이형규;박종원
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.29B no.10
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    • pp.10-18
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    • 1992
  • This paper considers and implementation of the memory system which provides simultaneous access to pq image points of block(p$\times$q), horizontal vector(1$\times$pq)and/vertical vector(pq$\times$1) in 2-dimension image array, where p and q are design parameters. This memory system consists of an address calculation circuit, address routing circuit, data routing circuit, module selection circuit and m memory modules where m>qp. The address calculation circuit computes pq addresses in parallel by using the difference of addresses among image points. Extra module assignment circuit is not used by improving module selection circuit with routhing circuit. By using Verilog-XL logic simulator, we verify the correctness of the memory system and estimate the performance. The implemented system provides simultaneous access to 16 image points and is 6 times faster than conventional memory system.

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Short Circuit Electromagnetic Force Prediction by Coupled Electromagnetic-Mechanical Field Analysis of Dry-Type Transformer (전자계-기계계 결합해석에 의한 건식변압기의 단락강도 예측)

  • Ahn, Hyun-Mo;Hahn, Sung-Chin
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.2
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    • pp.301-308
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    • 2011
  • This paper deals with the coupled electromagnetic-mechanical field analysis for short-circuit electromagnetic force of the dry-type transformer. The short-circuit currents are calculated using external circuit in accordance with short-circuit test equipment. According to short-circuit current, the generated magnetic leakage flux density in dry-type transformer model is calculated by finite element method. The radially-directed electromagnetic forces in windings are calculated using electromagnetic field analysis and then axially-directed electromagnetic forces in windings are calculated using electromagnetic-mechanical field analysis. The calculated axially-directed electromagnetic forces in high voltage winding are compared to those of measured ones and showed good agreement with experimental results.

A Study on the Length of Electrical Separation Joint in AF Track Circuit (AF궤도회로에서 전기적 절연구간의 길이에 대한 연구)

  • Lee, Myung-Chul;Park, Jae-Young
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.1
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    • pp.70-75
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    • 2013
  • The electrical separation joint as a filter circuit distributes the track circuit frequency. The electrical separation joint is classified into the interval where reinforcing bars are insulated and not insulated through the length of track circuit. In case of incorrectly setting up the length of electrical separation joint, the amplitude of current on the track circuit is not over standard current which is the standard of current on the track circuit and it effects on the close frequency on track circuit. Then, it makes an accident or makes a train not receive information for train control. In this paper, the electrical separation joint model is suggested and parameters are numerically calculated in the model. Moreover, the length of electrical separation joint is analyzed and is demonstrated by uisng Matlab and PSpice program.

Circuit Design of Drive Control for Winch Drum (윈치드럼 구동제어 회로설계)

  • 조상훈;양승윤;박래석
    • Journal of the Korea Institute of Military Science and Technology
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    • v.5 no.1
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    • pp.45-58
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    • 2002
  • In this paper, we designed the circuit of drive control for towing winch. It is composed of reference voltage circuit for driving voltage reference, low pass filter circuit for noise reduction, dead zone circuit for initial transient input, and driving circuit for drum direction/velocity control. Also it is realized a drive control circuit for towing winch drum in accordance with PWM(pulse width modulation) method to suit it's purpose of a large capacity driving system. The performance of the designed circuit is analyzed by experiments and the appliablity for driving the towing winch drum satisfactorily is evaluated through a various testing.

An Electrical Characteristics Analysis of Electronic Blood Pressure Depressor (전자혈압강하기의 전기적 특성 분석)

  • Lee, K.S.;Suh, J.H.;Lee, J.W.
    • Journal of Power System Engineering
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    • v.10 no.1
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    • pp.83-89
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    • 2006
  • Recently, the seriousness of high blood pressure was appeared as the most frequent disease of a the whole sickness in the world. However, the treatment of this disease is uncertain and produces an adverse reaction of a medicine therapy. Also, the patients are burdened with a fee for medical treatment. Therefore, in this paper, we studied effectively and financially to execute the treatment of high blood pressure using the Chinese medicine theorem that is recently arousing the great interest of the people. The main theories in this paper are blood vessel theory and acupuncture, respectively. Especially, the composed circuit systems are classified the blood pressure depressor part and the meridian points discrimination part, respectively. The blood pressure depressor part is composed generally of low-frequency generation circuit, charging-discharging circuit, and micro-computer circuit. Finally, this research have the advantage of discrimination parts such as regular voltage generating circuit, stimulus circuit, amplifying circuit, and alarm circuit.

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THE RECENT TREND OF BUILD-UP PRINTED CIRCUIT BOARD TECHNOLOGIES

  • Takagi, Kiyoshi
    • Journal of the Korean institute of surface engineering
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    • v.32 no.3
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    • pp.289-296
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    • 1999
  • The integration of the LSI has been greatly improved and the circuit patters on the LSI are becoming finer line and pitch. The high-density electronic packaging technology is improved. In order to realize the high-density packaging technology, the density of the circuit wiring of the printed circuit boards have also been more dense. The build-up process multilayer printed circuit board technology have a lot of vias, possibilities of the finer conductor wirings and have a freedom of capabilities of wiring design. The build-up process printed circuit boards have the wiring rules which are the pattern width: $100-20\mu\textrm{m}$, the via hole diameter: $100-50\mu\textrm{m}$. There three kinds of build-up processes as far materials and hole drilling. In this paper, the recent technology trends of the build-up printed circuit board technologies are described.

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A Study on the Test Method of RLC Parallel Circuits on the Device-Mounted Electronic Circuit Board (부품이 실장된 전자회로보드의 RLC 병렬회로 검사기법에 대한 연구)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.8
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    • pp.475-481
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    • 2005
  • In the existing ICT technique, the mounted electronic devices on the printed circuit board are tested whether the devices are good or not by comparing and measuring the value of the devices after separating the devices to be tested from around it based on the guarding method. But, in case that resistance, inductor and capacitor are configured as a parallel circuit on the circuit pattern, values for each device can not be measured because the total impedance value of the parallel circuit is measured. Accordingly, it is impossible to test whether the parallel circuit is good or not in case that the measured impedance value is within the tolerance error. Also, it is difficult to identify that which device among R, L and C of the parallel circuit is bad in case that the measured impedance value is out of the tolerance error. Accordingly, this paper proposes a test method which can enhance the quality and productivity by separating and measuring accurately R, L and C components from the RLC parallel circuits on the device-mounted printed circuit board. First, the RLC parallel circuit to be test is separated electrically from around it using three-terminal guarding technique. And then R, L and C values are computed based on the total impedance values and phase angles between voltage and current of the parallel circuit measured from two AC input signals with other frequency, Finally, the availability and accuracy of the proposed test method is verified by reviewing the simulation results.