• 제목/요약/키워드: Circuit

검색결과 16,986건 처리시간 0.034초

Rogowski Coil 기반의 전류 센싱 회로를 적용한 SiC MOSFET 단락 보호 회로 설계 (Short-circuit Protection Circuit Design for SiC MOSFET Using Current Sensing Circuit Based on Rogowski Coil)

  • 이주아;변종은;안상준;손원진;이병국
    • 전력전자학회논문지
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    • 제26권3호
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    • pp.214-221
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    • 2021
  • SiC MOSFETs require a faster and more reliable short-circuit protection circuit than conventional methods due to narrow short-circuit withstand times. Therefore, this research proposes a short-circuit protection circuit using a current-sensing circuit based on Rogowski coil. The method of designing the current-sensing circuit, which is a component of the proposed circuit, is presented first. The integrator and input/output filter that compose the current-sensing circuit are designed to have a wide bandwidth for accurately measuring short-circuit currents with high di/dt. The precision of the designed sensing circuit is verified on a double pulse test (DPT). In addition, the sensing accuracy according to the bandwidth of the filters and the number of turns of the Rogowski coil is analyzed. Next, the entire short-circuit protection circuit with the current-sensing circuit is designed in consideration of the fast short-circuit shutdown time. To verify the performance of this circuit, a short-circuit test is conducted for two cases of short-circuit conditions that can occur in the half-bridge structure. Finally, the short-circuit shutdown time is measured to confirm the suitability of the proposed protection circuit for the SiC MOSFET short-circuit protection.

저압용 IEC 차단기와 국내 차단기 혼용방안에 관한 연구 (The Study About Low Voltage Circuit Breaker Mix Method Between IEC Circuit Breaker and Domestic Circuit Breaker)

  • 정진수;김한상;한운기;김선구;박찬엄
    • 전기학회논문지
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    • 제61권6호
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    • pp.905-909
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    • 2012
  • Recent WTO/TBT agreement was adopted by the IEC domestic. For this reason, low voltage electrical equipment was many Confusion arises. Low voltage circuit was also one of these. The case of low voltage circuit, existing domestic circuit breakers and circuit breakers IEC curve differs from the behavior of each other. If low voltage circuit breaker wrong facility, circuit breaker malfunction may occur due to the large property damage. In this paper, to solve these problems domestic circuit breakers and circuit breaker operation IEC curves were analyzed. And, through experiments suggested compatible breaker way.

LOW DIRECT-PATH SHORT CIRCUIT CURRENT OF THE CMOS DIGITAL DRIVER CIRCUIT

  • Parnklang, Jirawath;Manasaprom, Ampaul;Laowanichpong, Nut
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2003년도 ICCAS
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    • pp.970-973
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    • 2003
  • Abstract An idea to redce the direct-path short circuit current of the CMOS digital integrated circuit is present. The sample circuit model of the CMOS digital circuit is the CMOS current-control digital output driver circuit, which are also suitable for the low voltage supply integrated circuits as the simple digital inverter, are present in this title. The circuit consists of active MOS load as the current control source, which construct from the saturated n-channel and p-channel MOSFET and the general CMOS inverter circuits. The saturated MOSFET bias can control the output current and the frequency response of the circuit. The experimental results show that lower short circuit current control can make the lower frequency response of the circuit.

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Applying Parallel Processing Technique in Parallel Circuit Testing Application for improve Circuit Test Ability in Circuit manufacturing

  • Prabhavat, Sittiporn;Nilagupta, Pradondet
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.792-793
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    • 2005
  • Circuit testing process is very important in IC Manufacturing there are two ways in research for circuit testing improvement. These are ATPG Tool Design and Test simulation application. We are interested in how to use parallel technique such as one-side communication, parallel IO and dynamic Process with data partition for circuit testing improvement and we use one-side communication technique in this paper. The parallel ATPG Tool can reduce the test pattern sets of the circuit that is designed in laboratory for make sure that the fault is not occur. After that, we use result for parallel circuit test simulation to find fault between designed circuit and tested circuit. From the experiment, We use less execution time than non-parallel Process. And we can set more parameter for less test size. Previous experiment we can't do it because some parameter will affect much waste time. But in the research, if we use the best ATPG Tool can optimize to least test sets and parallel circuit testing application will not work. Because there are too little test set for circuit testing application. In this paper we use a standard sequential circuit of ISCAS89.

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FSR로 구성된 촉각 센서 패드용 Readout 회로의 설계 및 구현 (Design and Implementation of a Readout Circuit for a Tactile Sensor Pad Based on Force Sensing Resistors)

  • 윤선호;백승희;김청월
    • 센서학회지
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    • 제26권5호
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    • pp.331-337
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    • 2017
  • A readout circuit for a tactile sensor pad based on force sensing resistors was proposed, which was composed of an analog signal conditioning circuit and a digital circuit with a microcontroller. The conventional signal conditioning circuit has a dc offset voltage in the output signal, which results from the reference voltage applied to the FSR devices. The offset voltage reduces the dynamic range of the circuit and makes it difficult to operate the circuit under a low voltage power supply. In the proposed signal conditioning circuit, the dc offset voltage was removed completely. The microcontroller with A/D converter and D/A converter was used to enlarge the measurement range of pressure. For this, the microcontroller adjusts the FSR reference voltage according to the resistance magnitude of FSR under pressure. The operation of the proposed readout circuit which was connected to a tactile sensor pad with $5{\times}10$ FSR array was verified experimentally. The experimental results show the proposed readout circuit has the wider measurement range of pressure than the conventional circuit. The proposed circuit is suitable for low voltage and low power applications.

한류형 반도체 교류 차단기 개발에 관한 연구 (A Study on Development of Current Limiting solid-state AC circuit Breaker)

  • 이우영;김용주
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1990년도 추계학술대회 논문집 학회본부
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    • pp.73-77
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    • 1990
  • In this paper we describe the solid-state ac-circuit breaker which has the characteristic of both a half cycle circuit breaker and a current limiting circuit breaker. This circuit breaker has a current limiting resistor in order to surprises the fault current to a certain level and discharge the energe included in circuit inductor. We explain the effect of circuit parameter on transient phenomena of switch device by using EMTP and finally design the control circuit consisted synchronous closing circuit, over- current detecting circuit and sensing circuit of rate of rise of fault current.

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레이저를 이용한 거리센서의 디지털 회로의 설계 (A Design of Digital Laser Theodolite)

  • 최인원;김현철;유수엽;윤희상
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 심포지엄 논문집 정보 및 제어부문
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    • pp.330-332
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    • 2006
  • A short distance laser range detector was developed on digital circuit. The circuit changed the analog circuit to digital circuit as possible as. The currently available laser range circuit one uses analog circuit mainly. But this ranger design targeted mass production with digital reporting function. So digital circuits replaced the analog circuit except amplifier and remained minor circuits those are hard to replace with digital circuit. The simulation shows that it is possible to make a reasonable distance measuring circuit on a digital circuit for very low price compare to analog circuit one.

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IGBT 인버터를 위한 향상된 단락회로 보호기법 (An Improved Short Circuit Protection Scheme for IGBT Inverters)

  • 서범석;현동석
    • 전력전자학회논문지
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    • 제3권4호
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    • pp.426-436
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    • 1998
  • Identification of fault current during the operation of a power semiconductor switch and activation of suitable remedial actions are important for reliable operation of power converters. A short circuit is a basic and severe fault situation in a circuit structure such as voltage source converters. This paper presents a new active protection circuit for fast and precise clamping and safe shutdown of fault currents of the IGBTs. This circuit allows operation of the IGBTs with a higher on-state gate voltage, which can thereby reduce the conduction loss in the device without compromising the short circuit protection characteristics. The operation of the circuit is studied under various conditions, considering variation of temperature, rising rate of fault current, gate voltage value, and protection circuit parameters. An evaluation of the operation of the circuit is made using IGBTs from different to confirm the effectiveness of the protection circuit.

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40 Gb/s 광통신 수신기용 클락 복원 회로 설계 (Design of the Clock Recovery Circuit for a 40 Gb/s Optical Receiver)

  • 박찬호;우동식;김강욱
    • 한국전자파학회:학술대회논문집
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    • 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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    • pp.136-139
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    • 2003
  • A clock recovery circuit for a 40 Gb/s optical receiver has been designed and implemented. The clock recovery circuit consists of signal amplifiers, a nonlinear circuit with diodes, and a bandpass filter Before implementing the 40 Gb/s clock recovery circuit, a 10 Gb/s clock recovery circuit has been successfully implemented and tested. With the 40 Gb/s clock recovery circuit, when a 40 Gb/s NRZ signal of -10 dBm was applied to the input of the circuit, the 40 GHz clock was recovered with the -20 dBm output power after passing through the nonlinear circuit. The output signal from the nonlinear circuit passes through a narrow-band filter, and then amplified. The implemented clock recovery circuit is planned to be used for the input of a phase locked loop to further stabilize the recovered clock signal and to reduce the clock jitter.

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SCR특성의 실현에 관한 연구 (A Study on Realization of SCR Characteristics)

  • 박의열
    • 전기의세계
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    • 제22권2호
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    • pp.70-74
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    • 1973
  • This paper dealt with circuit modeling of SCR and gate turn-off SCR by using complementary symmetrical tansistor circuit, which is modified circuit of input current dependent, current stable negative resitance circuit. Operation of this circuit is estimated and analyzed, with which compared with conventional SCR modeling circuit. Also operation and the design procedures are checked by experiments.

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