• Journal of the Microelectronics and Packaging Society
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• v.6 no.2
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• pp.13-21
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• 1999

Flip chip assembly directly on organic boards offers miniaturization of package size as well as reduction in interconnection distances resulting in a high performance and cost-competitive Packaging method. This paper describes the investigation of alternative low cost flip-chip mounting processes using electroless Ni/Au bump and anisotropic conductive adhesives/films as an interconnection material on organic boards such as FR-4. As bumps for flip chip, electroless Ni/Au plating was performed and characterized in mechanical and metallurgical point of view. Effect of annealing on Ni bump characteristics informed that the formation of crystalline nickel with $Ni_3$P precipitation above $300^{\circ}C$ causes an increase of hardness and an increase of the intrinsic stress resulting in a reliability limitation. As an interconnection material, modified ACFs composed of nickel conductive fillers for electrical conductor and non-conductive inorganic fillers for modification of film properties such as coefficient of thermal expansion(CTE) and tensile strength were formulated for improved electrical and mechanical properties of ACF interconnection. The thermal fatigue life of ACA/F flip chip on organic board limited by the thermal expansion mismatch between the chip and the board could be increased by a modified ACA/F. Three ACF materials with different CTE values were prepared and bonded between Si chip and FR-4 board for the thermal strain measurement using moire interferometry. The thermal strain of ACF interconnection layer induced by temperature excursion of $80^{\circ}C$ was decreased with decreasing CTEs of ACF materials.

• Resources Recycling
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• v.3 no.1
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• pp.38-43
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• 1994

The separation of valuable metals from IC chip scrap generated by domestic electronic company was carried out using the mechanical beneficiation such as shredding, crushing, screening and magnetic separation. The distribution of metals in various sizes of crushed IC chip scrap was investigated and metals present in crushed products was separated with the magnetic separator. The particle size distribution of crushed IC chip scrap was 7.5% for +3mm, 17.0% for 3~1mm and 75.5% for -1mm. The weight loss of crushed IC chip scrap was 18% when roasted at $700^{\circ}C$. The content of metals was 96% for +3~1mm, 13% for 1~0.595mm, 3.7% for 0.95~0.5. Au of 99% was present in -1mm crushed IC chip scrap. Ni, Fe, Cu, Sn and Pb were separated from crushed IC chip scrap by the magnetic separator under 700 and 2, 500 Gauss.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.2
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• pp.103-111
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• 2019

The IoT-driven large-scaled systems consist of connected things with on-chip executable embedded software. These light-weighted embedded things have limited hardware space, especially small size of on-chip flash memory. In addition, on-chip embedded software in flash memory is not easy to update in runtime to equip with latest services in IoT-driven applications. It is becoming important to develop light-weighted IoT devices with various software in the limited on-chip flash memory. The remote instruction execution in cloud via IoT connectivity enables to provide high performance software execution with unlimited software instruction in cloud and low-power streaming of instruction execution in IoT edge devices. In this paper, we propose a Cloud-IoT asymmetric structure for providing high performance instruction execution in cloud, still low power code executable thing in light-weighted IoT edge environment using remote instruction execution. We propose a simulated approach to determine efficient partitioning of software runtime in cloud and IoT edge. We evaluated the instruction cloudification using remote instruction by determining the execution time by the proposed structure. The cloud-connected instruction set simulator is newly introduced to emulate the behavior of the processor. Experimental results of the cloud-IoT connected software execution using remote instruction showed the feasibility of cloudification of on-chip code flash memory. The simulation environment for cloud-connected code execution successfully emulates architectural operations of on-chip flash memory in cloud so that the various software services in IoT can be accelerated and performed in low-power by cloudification of remote instruction execution. The execution time of the program is reduced by 50% and the memory space is reduced by 24% when the cloud-connected code execution is used.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.12
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• pp.1359-1364
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• 2012

The C-band semi-lumped lowpass filter with broad stopband and compact size characteristic using chip inductor is proposed. To provide an additional attenuation pole in stopband by SRF, a separable inductor is added to proposed structure, and it has broad stopband characteristic. The third order elliptic function lowpass filter with chip inductor(L: 9.1 nH, SRF: 5.5 GHz, Q: 25) has insertion loss of 0.38 dB, cutoff frequency of 920 MHz, broad stopband(below 20 dB) of 1.43~7.8 GHz and the size is reduced 37.4 % compared to distributed inductor.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1261-1266
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• 2009

In this paper, triple band mobile chip antenna for DCS(1.71${\sim}$1.88GHz) / PCS(1.75${\sim}$1.87GHz) / UPCS(1.8S${\sim}$1.99GHz) on PCB Layout is designed. To analyze the characteristics of the designed antenna, we used commerical simulation tool(HFSS). Triple and wide band characteristic could be realized the measured bandwidth(V.S.W.R<2.0) of the designed antenna operated in 1.71GHz${\sim}$1.99GHz. The size of the designed antenna is about 19mm${\times}$4mm${\times}$1.6mm, narrow bandwidth which is a defect of chip antenna is improved. And its experimental results were a good agreement with simulation performance.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.2040-2042
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• 2004

This paper presents a miniature optical system for the fluorescence detection of the patterned protein chip. The patterned protein chip was fabricated using MEMS process. The fluorescence from the patterned protein chip was measured while varying the concentration of the BSA. The fluorescence light is separated spatially from the excitation beam using mini-size prism to increase SNR (Signal-to-Noise Ratio). The combination of prism and mirrors can convert the excitation light from the laser diode to uniform illumination on the specimen. We believe that the proposed system for fluorescence detection can be applied to rea1ization of point-of-care.

• ETRI Journal
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• v.32 no.2
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• pp.327-329
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• 2010

A fully integrated small form-factor HBT power amplifier (PA) was developed for UMTS Tx applications. For practical use, the PA was implemented with a well configured bottom dimension, and a CMOS control IC was added to enable/disable the HBT PA. By using helix-on-pad integrated passive device output matching, a chip-stacking technique in the assembly of the CMOS IC, and embedding of the bulky inductive lines in a multilayer substrate, the module size was greatly reduced to 2 mm ${\times}$ 2.2 mm. A stage-bypass technique was used to enhance the efficiency of the PA. The PA showed a low idle current of about 20 mA and a PAE of about15% at an output power of 16 dBm, while showing good linearity over the entire operating power range.

• Journal of Welding and Joining
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• v.25 no.2
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• pp.76-81
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• 2007

Solder bumps have been used to interconnect the chip and substrate, and the size of the solder bump decreases below $100{\mu}m$ to accommodate higher packaging density. In order to fabricate solder bumps, a mold to chip transfer process is suggested in this work. Since the thin stainless steel mold is not wet by the solder, the molten solder is forced to fill the mold cavities with ultrasonic vibration. The solders within the mold cavities are transferred to the Cu pads on the polyimide film through reflow soldering.

• Proceedings of the KIEE Conference
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• 1991.07a
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• pp.568-572
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• 1991

This paper describes the three-phase inverter system for 1/2[HP] induction servo motor, using TMS370C050 single-chip microprocessor. The Power MOSFETs are used for PWM inverter circuit because of the advantages such as less harmonic losses and smaller peak current, less torque ripples and noises. Single-chip microprocessor enables the whole controller to be simple and reduced size as well as to more stable and flexible. The basic structures are shown for the power circuit, including the protection and driving circuitry, and the control loops for inverter control functions. The experimental results are given for the prototype PWM inverter system.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.11
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• pp.2127-2130
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• 2008

In this paper, a tunable bandpass filter with mutual inductive coupling circuits is newly designed and demonstrated for UHF TV tuner ranged from Ch.14(473MHz) to Ch.69(803MHz) applications. Conventional HF tuning circuit with an electromagnetic bandpass filter has several problems such as large size, high volume and high cost, since the electromagnetic filter is comprised of several passive components and air core inductors to be assembled and controlled manually. To address these obstacles, peaking chip inductor was newly applied for constructing the mutual inductive coupling circuit. The proposed circuit was newly and optimally designed, since the chip inductor showed lower components Q-value than the air core inductor. A varactor diode has been also used to fabricate the proposed tunable bandpass filter for RF tuning circuit. The fabricated tunable filter exhibited low insertion loss of approximately -3dB, high return loss of below -10dB, and large tuning bandwidth of 330MHz.