• Journal of Korea Technical Association of The Pulp and Paper Industry
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• v.32 no.1
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• pp.26-32
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• 2000

The impact of major surface chemical properties of silica sols on the retention and drainage performance of the silica based micrparticle system, Compozil was investigated using four different silica sols. And the effect of silica properties on the interactions with cationic starch and cationic plyacrylamide has also been identified. The surface charge density and the stability over pH of silica sols were increased by introducing aluminosilicate anions at surface. It was found that the charge density of silica sols determined the addition level necessary to attain the maximum retention and drainage. When silica sols were combined with cationic starch, the change density of the product was the critical properties and the degree of microagregation was of minor importance. In the cationic polyacrylamide system the degree of colloid structure appeared to be a more critcial property than the charge density of silica sols.

• Journal of IKEEE
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• v.25 no.4
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• pp.770-773
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• 2021

In this paper, the retention characteristics of 3D NAND flash memory applied with tapering and ferroelectric (HfO₂) structure were analyzed after programming operation. Electrons trapped in nitride are affected by lateral charge migration over time. It was confirmed that more lateral charge migration occurred in the channel thickened by tapering of the trapped electrons. In addition, the Oxide-Nitride-Ferroelectric (ONF) structure has better lateral charge migration due to polarization, so the change in threshold voltage (V_th) is reduced compared to the Oxide-Nitride-Oxide (ONO) structure.

• Proceedings of the Korea Technical Association of the Pulp and Paper Industry Conference
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• 2007.11a
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• pp.21-33
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• 2007

CPAM has been applied to the paper industry for the purpose of wet-end improvement for a long time. And molecular weight and charge density have been managed most important quality factors to make CPAM for this application. Recently branched CPAM was developed to improve retention and drainage characteristics and we considered branch degree of CPAM as important factor as molecular weight and charge density. In this experiment, we tried to investigate physical and chemical properties to determine branch degree and flocculation efficiency using Arbocell pulp which was recently developed micro size pulp and finally we applied retention and drainage test under the ONP stock condition.

• Proceedings of the Korea Technical Association of the Pulp and Paper Industry Conference
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• 1999.11b
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• pp.56-60
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• 1999

In this paper, a series of amphoteric polyacrylamide(PAM) with different molecular weight and charge were synthesized and used as retention and dewatering aids. Better products had been selected and tested under varied conditions. Effects of molecular weight, cationic charge density, degree of hydrolysis and other factors of PAM on retention and dewatering of papermaking were also considered. Finally, synthesized quaternary and tertiary ammonium amphoteric polyacrylamide were practised in paper mill trial.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.34-39
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• 2014

This paper discusses the 3-level charge pumping (CP) method in planar-type Silicon-Oxide-High-k-Oxide-Silicon (SOHOS) and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) devices to find out the reason of the degradation of data retention properties. In the CP technique, pulses are applied to the gate of the MOSFET which alternately fill the traps with electrons and holes, thereby causing a recombination current Icp to flow in the substrate. The 3-level charge pumping method may be used to determine not only interface trap densities but also capture cross sections as a function of trap energy. By applying this method, SOHOS device found to have a higher interface trap density than SONOS device. Therefore, degradation of data retention characteristics is attributed to the many interface trap sites.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.3
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• pp.47-52
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• 2017

This research scrutinizes the data retention characteristics of the MLC NAND Flash Memory instigated by the loss effect of trapped charge when the memory is in the state of program saturation. It is attributed to the threshold voltage saturation phenomenon which engenders an interruption to the linear increase of the voltage in the memory cell. This phenomenon is occasioned by the outflow of the trapped charge from the floating gate to the control gate, which has been programmed by the ISPP (Incremental Step Pulse Programming), via Inter-Poly Dielectric (IPD). This study stipulates the significant degradation of thermal retention characteristics of threshold voltage in the saturation region in contrast to the ones in the linear region. Thus the current study evaluates the data retention characteristics of voltage after the program with a repeated reading test in various measurement conditions. The loss effect of trapped charge is found in the IPD layer located between the floating gate and the control gate especially in the nitride layer of the IPD. After the thermal stress, the trapped charge is de-trapped and displays the impediment of the characteristic of reliability. To increase the threshold saturation voltage in the NAND Flash Memory, the storage ability of the charge in the floating gate must be enhanced with a well-thought-out designing of the module in the IPD layer.

• Transactions on Electrical and Electronic Materials
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• v.5 no.4
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• pp.148-152
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• 2004

The direct lateral profile and retention characteristics of locally trapped-charges in the nitride layer of the two-bit polysilicon-oxide-nitride-oxide-silicon (SONOS) memory are investigated by using the charge pumping method. After charges injection at the drain junction region, the lateral diffusion of trapped charges as a function of retention time is directly shown by the results of the local threshold voltage and the trapped-charges quantities.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.282.1-282.1
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• 2016

The remarkable physical properties of two-dimensional (2D) semiconducting materials such as molybdenum disulfide ($MoS_2$) and tungsten disulfide ($WS_2$) etc. have attracted considerable attentions for future high-performance electronic and optoelectronic devices. The ongoing studies of $MoS_2$ based nonvolatile memories have been demonstrated by worldwide researchers. The opening hysteresis in transfer characteristics have been revealed by different charge confining layer, for instance, few-layer graphene, $MoS_2$, metallic nanocrystal, hafnium oxide, and guanine. However, limited works built their nonvolatile memories using entirely of assembled 2D crystals. This is important in aspect view of large-scale manufacture and vertical integration for future memory device engineering. We report $WS_2$ based nonvolatile memories utilizing functional van der Waals heterostructure in which multi-layered graphene is encapsulated between $SiO_2$ and hexagonal boron nitride (hBN). We experimentally observed that, large memory window (20 V) allows to reveal high on-/off-state ratio (>$10^3$). Moreover, the devices manifest perfect retention of 13% charge loss after 10 years due to large graphene/hBN barrier height. Interestingly, the performance of our memories is drastically better than ever published work related to $MoS_2$ and black phosphorus flash memory technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.1
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• pp.1-8
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• 2005

We fabricate PLT(5) thin film on Pt/TiO/sub x/SiO₂/Si substrate by using sol-gel method and investigate leakage current, switching and retention properties. The leakage current density of PLT(5) thin film is 3.56×10/sup -7/A/㎠ at 4V. In the examination of switching properties, pulse voltage and load resistance were 2V～5V and 50Ω～3.3kΩ, respectively. Switching time has a tendency to decrease from 0.52㎲ to 0.14㎲ with the increase of pulse voltage, and also the time increases from 0.14㎲ to 13.7㎲ with the increase of load resistance. The activation energy obtained from the relation of applied pulse voltage and switching time is about 135kV/cm. The error of switched charge density between hysteresis loop and experiment of polarization switching is about 10%. Also, polarization in retention decreases as much as about 8% after l0/sup 5/s.

• Journal of the Semiconductor & Display Technology
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• v.18 no.4
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• pp.138-142
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• 2019

As the NAND flash memory goes to 3D vertical Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) structure, the lateral charge migration can be critical in the reliability performance. Even more, with miniaturization of flash memory cell device, just a little movement of trapped charge can cause reliability problems. In this paper, we propose a method of predicting the trapped charge profile in the retention mode. Charge diffusivity in the charge trapping layer (Si₃N₄) was extracted experimentally, and the effect on the trapped charge profile was demonstrated by the simulation and experiment.