• 한국전기전자재료학회논문지
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• 제17권7호
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• pp.782-787
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• 2004

Superconducting flux flow transistor (SFFT) is based on a control of the Abrikosov vortex flowing along a channel. The induced voltage by moving of the Abrikosov vortex in an SFFT is greatly affected by the thickness, the width, and the length of channel. In order to fabricate a reproducible channel in the SFFT, we studied the variation of the critical characteristics of ${YBa}_2{Cu}_3{O}_7-\delta(YBCO)$ thin films with the etching time using ICP (Inductively coupled plasma) system. From the simulation, it was certified that the vortex velocity was increased in a low pinning energy at channel width 0,5 mm. The surfaces of YBCO thin film were etched by ICP etching system. We observed the etched channel surfaces by AFM (Atomic Force Microscope) and measured the critical current density with etching time. As a measured results, the etching thickness of channel should be optimized to fabricated a flux flow transistor with specified characteristics.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 추계학술대회 논문집 Vol.16
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• pp.259-262
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• 2003

Superconducting flux flow transistor(SFFT) is based on a control of the Abrikosov vortex flowing along a channel. The induced voltage by moving of the Abrikosov vortex in SFFT is greatly affected by the thickness and width, of channel. In order to fabricate a reproducibility channel in SFFT, we have researched the variation of the critical characteristics of YBCO thin films with the etching time using ICP(Inductively coupled plasma) system. It was certified that the velocity of vortex decreased with increasing the width of channel and was saturated faster in low bias from a simulation. An etching mechanism of YBCO thin films by ICP system was also certified by AFM(Atomic Force Microscope) and by measuring the critical current density with etching time. As measurement result, we could analyze that we should optimize the etching thickness of channel part to construct a flux flow transistor with desired characteristics.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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• pp.1500-1503
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• 1997

In this paper a multiple channel EPD controller is developed which enables us to detect endpoints simultaneously in the plasma etching process operated in multiple etching chambers and its performance characteristic are investigated. for the accurate detectiion of endpoint the developed EDP controller was able to implement endpoint detectiions by integrating the existing EPD controllers with the techiques of artificial intellignet, to enhance its performance. The performance of the developed EPD controller was carried out by repeated experiments of endpoint detection in the acrual production line of semiconductor manufacturing. It's utility for endpoint detectiion was accurately evaluated in various etching process. The control capability of multiple etching chambers enhances its application compared with the existing one, and also increases the user utility os that the efficiency of operation was improved.

• 전기전자학회논문지
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• 제13권4호
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• pp.23-27
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• 2009

실리콘 기판 상에 MBE (molecular beam epitaxy)로 형성된 GaSb 기반 p-channel HEMT 소자를 제작하기 위하여 오믹 접촉 형성 공정과 식각 공정을 연구하였다. 먼저 각 소자의 절연을 위한 메사 식각 공정 연구를 수행하였으며, HF기반의 습식 식각 공정과 ICP(inductively coupled plasma)를 이용한 건식 식각 공정이 모두 사용되었다. 이와 함께 소스/드레인 영역 형성을 위한 오믹 접촉 형성 공정에 관한 연구를 진행하였으며 Ge/Au/Ni/Au 금속층 및 $300^{\circ}C$ 60초 RTA공정을 통해 $0.683\;{\Omega}mm$의 접촉 저항을 얻을 수 있었다. 더불어 HEMT 소자의 게이트 형성을 위한 게이트 리세스 공정을 AZ300 현상액과 citric산 기반의 습식 식각을 이용하여 연구하였으며, citric산의 경우 소자 구조에서 캡으로 사용된 GaSb와 베리어로 사용된 AlGaSb사이에서 높은 식각 선택비를 보였다.

• 한국전기전자재료학회논문지
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• 제16권5호
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• pp.424-428
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• 2003

The channel of a superconducting flux flow transistor has been fabricated with plasma etching method using a inductively coupled plasma etching. The ICP conditions then were ICP Power of 450 W, rf chuck power of 150 W, the pressure in chamber of 5 mTorr, and Ar : Cl$_2$=1:1. Especially, over the 5 mTorr, the superconducting thin films were not etched. The channel etched by plasma gas showed the critical temperature over 85 K. The critical current of the SFFT was altered by varying the external applied current. As the external applied current increased from 0 to 12 mA, the critical current decreased from 28 to 22 mA. Then the obtained trans-resistance value was smaller than 0.1 $\Omega$ at a bias current of 40 mA.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1924-1926
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• 2001

A novel wet release process ($\mu$ CARP - Micro Channel Assisted Release Process) for releasing an extreme large-area plate structure without etching hole is proposed and experimented. Etching holes in conventional process reduce a effective area and degrade an optical characteristics by a diffraction. In addition, as the area of a released structure increases, the stietion becomes more serious. The proposed process resolves these problems by the introduction of a micro fluidic channel beneath the structure which will be released. In this paper, a 5 mm${\times}$5mm-single crystal silicon plate structure was released by the proposed $\mu$CARP without etch holes on the structure. The variation in etching time with respect to the of the introduced micro channel is also examined. This process is expected to be beneficial for the actuator of a nano-scale data storage and the scanning mirror.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.711-714
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• 2004

A new design for improving the aperture ratio of bottom emission type AMOLED is investigated. In conventional, the TFT of AMOLED fabrication method is "Etch Stopper (7-mask)", so the aperture ratio is limited in 28${\sim}$33% by Cs(Storage Capacitor). A high aperture ratio TFT is designed by using BCE(Back Channel Etching 5-mask) fabrication way and the aperture ratio is up to 40% shown in 2.2"AMOLED display.

• 한국전기전자재료학회논문지
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• 제24권2호
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• pp.152-155
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• 2011

Even though nano-scale materials were very advantageous for various applications, there are still problems to be solved such as the stabilization of surface state and realization of low contact resistances between a semiconducting nanowire and electrodes in nano-electronics. It is well known that the effects of contacts barrier between nano-channel and metal electrodes were dominant in carrier transportation in individual nano-electronics. In this report, it was investigated the electrical properties of GaN nanorod devices after chemical etching and rapid thermal annealing for making good contacts. After KOH wet-etching of the contact area the devices showed better electrical performance compared with non-treated GaN individual devices but still didn't have linear voltage-current characteristics. The shape of voltage-current properties of GaN devices were improved remarkably after rapid thermal annealing as showing Ohmic behaviors with further bigger conductivities. Even though chemical etching of the nanorod surfaces could cause scattering of carriers, in here it was shown that the most important and dominant factor in carrier transport of nano-electronics was realization of low contact barrier between nano-channel and metal electrodes surely.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.74-77
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• 2002

The channel of the superconducting Flux Flow Transistor has been fabricated with plasma etching method using ICP. The ICP conditions were 700 W of ICP power, 150 W of rf chuck power, 5 mTorr of the pressure in chamber and 1:1 of Ar : Cl$_2$, respectively. The channel etched by plasma gas showed superconducting characteristics of over 77 K and superior surface morphology. The critical current of SFFT was altered by varying the external applied current. As the external applied current increased from 0 to 12 mA, the critical current decreased from 28 to 22 mA. Then the obtained r$\sub$m/ values were smaller than 0.1Ω at a bias current of 40 mA. The current gain was about 0.5. Output resistance was below 0.2 Ω.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2004년도 추계학술대회 논문집
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• pp.351-354
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• 2004

This work presents a simple and cost-effective approach for maskless fabrication of positive-tone silicon master for the replica molding of hyperfine elastomeric channel. Positive-tone silicon masters were fabricated by a maskless fabrication technique using the combination of nanoscratch by Nanoindenter ⓡ XP and XOH wet etching. Grooves were machined on a silicon surface coated with native oxide by ductile-regime nanoscratch, and they were etched in a 20 wt％ KOH solution. After the KOH etching process, positive-tone structures resulted because of the etch-mask effect of the amorphous oxide layer generated by nanoscratch. The size and shape of the positive-tone structures were controlled by varying the etching time (5, 15, 18, 20, 25, 30 min) and the normal loads (1, 5 mN) during nanoscratch. Moreover, the effects of the Berkovich tip alignment (0, 45$^{\circ}$) on the deformation behavior and etching characteristic of silicon material were investigated.