• Title/Summary/Keyword: Cell voltages

검색결과 177건 처리시간 0.025초

Experimental Analyses of Cell Voltages for a Two-cell PEM Stack Under Various Operating Conditions

  • Park, Sang-Kyun;Choi, Jae-Hyuk
    • Journal of Advanced Marine Engineering and Technology
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    • 제35권7호
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    • pp.881-890
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    • 2011
  • Analyses of performance and behavior of the individual PEM fuel cells (PEMFC) under different operating conditions are of importance optimally to design and efficiently to operate the stack. The paper focuses on experimental analyses of a two-cell stack under different operating conditions, which performance and behavior are measured by the voltage of a cell as well as the stack. Experimental parameters include stoichiometric ratio, temperature of the air supplied under different working stack temperatures and loads. Results showed that the cell voltages are dominantly influenced by the temperature of the air supplied among others. In addition, an inherent difference between the first and the second cell voltage exists because of the tolerances of the cell components and the resulting different over-potentials at different equilibrium states. Furthermore, it is shown that the proton conductivity in the membranes conditioned by the humidity in the cathode channel highly affects the voltage differences of the two cells.

STATCOM에서 영상분 전류주입에 의한 셀간 전압평형화 제어의 향상 (Enhancement of Cell Voltage Balancing Control by Zero Sequence Current Injection in a Cascaded H-Bridge STATCOM)

  • 권병기;정승기;김태형
    • 전력전자학회논문지
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    • 제20권4호
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    • pp.321-329
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    • 2015
  • The static synchronous compensator (STATCOM) of cascaded H-bridge configuration accompanying multiple separate DC sides is inherently subject to the problem of uneven DC voltages. These DC voltages in one leg can be controlled by adjusting the AC-side output voltage of each cell inverter, which is proportional to the active power. However, when the phase current is extremely small, large AC-side voltage is required to generate the active power to balance the cell voltages. In this study, an alternative zero-sequence current injection method is proposed, which facilitates effective cell balancing controllers at no load, and has no effect on the power grid because the injected zero sequence current only flows within the STATCOM delta circuit. The performance of the proposed method is verified through simulation and experiments.

기생저항 및 트랜지스터 비대칭이 고저항 SRAM 셀의 읽기동작에 미치는 영향 (Influence of Parasitic Resistances and Transistor Asymmetries on Read Operation of High-Resistor SRAM Cells)

  • 최진영;최원상
    • 전기전자학회논문지
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    • 제1권1호
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    • pp.11-18
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    • 1997
  • 회로 시뮬레이터를 이용하는 DC 셀 노드전압 분석방법을 적용하여, 고저항 SRAM 셀 구조에서 기생저항들과 트랜지스터 비대칭에 의해 야기되는 정적 읽기동작에서의 동작마진을 조사하였다. 이상적인 셀에 기생저항을 선택적으로 추가함으로써 각 기생저항들이 동작 마진에 끼치는 영향을 조사한 뒤, 기생저항이 좌우대칭 쌍으로 존재하는 경우에 대해 조사하고, 또한 셀 트랜지스터의 채널폭을 선택적으로 변화시켜 트랜지스터의 비대칭을 야기시킴으로써 트랜지스터 비대칭에 의한 동작 마진의 저하를 분석하였다. 분석 방법은 시뮬레이션된 셀 노드전압 특성에서 두 셀 노드전압이 하나의 값으로 수렴되는 전원전압의 값과 $V_{DD}=5V$에서 셀 노드전압의 차를 비교함으로써 상대적인 동작 마진을 비교하는 방법을 사용하였다. 회로 시뮬레이션에 의존한 본 분석으로부터 셀의 정적 읽기동작에 가장 심각한 영향을 끼치는 기생저항 성분과 트랜지스터의 비대칭 형태를 규명함으로써 새로운 셀 구조 설계시 참고할 수 있는 기준을 제시하였다.

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연료전지 셀 전압 모니터링 방법에 관한 연구 (Fuel Cell Stack Cell Monitoring Method)

  • 김동락;김현;이치노세토시히코
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2009년도 제40회 하계학술대회
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    • pp.1031_1032
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    • 2009
  • The voltages of unit cells of a fuel cell stack are one of the most significant factors to detect failure conditions and thereof safely control and operate the fuel cell system. In this paper, we describe two methods to monitor the voltages of the unit cells of a stack in consideration of data accuracy, circuit extensibility to various numbers of cells, and cost. The reported methods are approached by (i) the power isolation of cell voltage monitoring part from the communications part and (ii) the utilization of a commercially available cell monitoring integrated circuit IC of a Li-ion battery.

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A New Reference Cell for 1T-1MTJ MRAM

  • Lee, S.Y.;Kim, H.J.;Lee, S.J.;Shin, H.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권2호
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    • pp.110-116
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    • 2004
  • We propose a novel sensing scheme, which operates by sensing the difference in voltage between a memory cell and a reference cell for a magneto-resistive random access memory (MRAM). A new midpoint-reference generation circuit is adopted for the reference cell to improve the sensing margin and to guarantee correct operation of sensing circuit for wide range of tunnel magneto resistance (TMR) voltages. In this scheme, the output voltage of the reference cell becomes nearly the midpoint between the cell voltages of high and low states even if the voltage across the magnetic tunnel junction (MTJ) varies.

Individual DC Voltage Balancing Method at Zero Current Mode for Cascaded H-bridge Based Static Synchronous Compensator

  • Yang, Zezhou;Sun, Jianjun;Li, Shangsheng;Liao, Zhiqiang;Zha, Xiaoming
    • Journal of Electrical Engineering and Technology
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    • 제13권1호
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    • pp.240-249
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    • 2018
  • Individual DC voltage balance problem is an inherent issue for cascaded H-bridge (CHB) based converter. When the CHB-based static synchronous compensator (STATCOM) is operating at zero current mode, the software-based individual DC voltage balancing control techniques may not work because of the infinitesimal output current. However, the different power losses of each cell would lead to the individual DC voltages unbalance. The uneven power losses on the local supplied cell-controllers (including the control circuit and drive circuit) would especially cause the divergence of individual DC voltages, due to their characteristic as constant power loads. To solve this problem, this paper proposes an adaptive voltage balancing module which is designed in the cell-controller board with small size and low cost circuits. It is controlled to make the power loss of the cell a constant resistance load, thus the DC voltages are balanced in zero current mode. Field test in a 10kV STATCOM confirms the performance of the proposed method.

대용량 EEPROM 메모리 셀 검증용 모듈 회로 설계 (Design of a Cell Verification Module for Large-density EEPROM Memories)

  • 박헌;김일준;하판봉;김영희
    • 한국정보전자통신기술학회논문지
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    • 제10권2호
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    • pp.176-183
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    • 2017
  • 대용량 EEPROM 메모리를 테스트하는 경우 erase time과 program time이 많이 걸리는 문제가 있다. 또한 신뢰성 테스트를 진행하면서 각 스텝마다 EEPROM 셀의 문턱전압 VT를 테스트할 필요가 있다. 본 논문에서는 512kb EEPROM 셀 검증용 모듈 회로를 설계하였으며, negative VTE를 갖는 split gate EEPROM의 VT 측정을 위한 CG(Control Gate) 구동회로를 제안하였다. 제안된 CG 구동회로는 erase VT를 측정하기 위해 -3V~0V의 negative 전압이 인가될 수 있도록 asymmetric isolated HV (High-Voltage) NMOS 소자를 사용하였다. 그리고 test time reduction 모드에서는 even page, odd page, chip 단위로 erase나 program 수행이 가능하도록 회로를 설계하므로 512Kb EEPROM 전체 메모리를 erase하거나 program할 때 시간을 even page와 odd page를 이용하는 경우는 4ms, chip 전체로 하는 경우는 2ms로 테스트 시간을 줄일 수 있었다.

니트로 벤젠을 이용한 레이저 PT의 특성 연구 (Characteristic of Nitrobenzene Laser Potential Transformer.)

  • 김일중;이성규;한민구
    • 대한전기학회논문지
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    • 제36권12호
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    • pp.903-907
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    • 1987
  • A laser potential transformer(PT) has been developed and characterized to measure the voltages using electro-optic Kerr effect. Laser PT utilizing Kerr cell successfully measures applied voltages up to 3 KV. Experimental results show a good agreement with the theoretical values. Ierr constant of nitrobenzene is also measured and agrees very well with the published results. Applied voltages and modulated laser intensities are also characterized. (Jun 1) WE1

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An Improved Phase-Shifted Carrier Pulse Width Modulation Based on the Artificial Bee Colony Algorithm for Cascaded H-Bridge Multilevel Inverters

  • Cai, Xinjian;Wu, Zhenxing;Li, Quanfeng;Wang, Shuxiu
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.512-521
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    • 2016
  • Cascaded H-bridge multilevel (CHBML) inverters usually include a large number of isolated dc-voltage sources. Some faults in the dc-voltage sources result in unequal cell dc voltages. Unfortunately, the conventional phase-shifted carrier (PSC) PWM method that is widely used for CHBML inverters cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. This paper analyzes the principle of sideband harmonic elimination, and proposes an improved PSCPWM that can eliminate low frequency sideband harmonics under the condition of unequal dc voltages. In order to calculate the carrier phases, it is necessary to solve transcendental equations for low frequency sideband harmonic elimination. Therefore, an approach based on the artificial bee colony (ABC) algorithm is presented in this paper. The proposed PSCPWM method enhances the reliability of CHBML inverters. The proposed PSCPWM is not limited to CHBML inverters. It can also be applied to other types of multilevel inverters. Simulation and experimental result obtained from a prototype CHBML inverter verify the theoretical analysis and the achievements made in this paper.

Cell Balancing Method in Flyback Converter without Cell Selection Switch of Multi-Winding Transformer

  • Kim, Jin-Woong;Ha, Jung-Ik
    • Journal of Electrical Engineering and Technology
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    • 제11권2호
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    • pp.367-376
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    • 2016
  • This paper presents a cell balancing method for a single switch flyback converter with a multi-winding transformer. The conventional method using a flyback converter with a multi-winding transformer is simple and easy to control, but the voltage of each secondary winding coil might be non-uniform because of the unequal effective turn-ratio. In particular, it is difficult to control the non-uniform effect using turn-ratios because secondary coil has a limited number of turns. The non-uniform secondary voltages disturb the cell balancing procedure and induce an unbalance in cell voltages. Individual cell control by adding a switch for each cell can reduce the undesirable effect. However, the circuit becomes bulky, resulting in additional loss. The proposed method here uses the conventional flyback converter with an adjustment made to the output filters of the cells, instead of the additional switch. The magnitude of voltage applied to a particular cell can be reduced or increased according to the adjusted filter and the selected switching frequency. An analysis of the conventional converter configuration and the filter design method reveals the possibility of adequate cell balancing control without any additional switch on the secondary side.