• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2002년도 학술대회논문집
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• pp.363-368
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• 2002

Performance-based course design on the job of receiving substation installations is presented to achieve a work based curriculum development. It includes a job analysis method called ISD(Instructional Systems Design & Development) and DACUM(Developing a Curriculum) which is designed to accept various requirements of industrial fields. It is provided with course profile, key contents, terminal learning objectives, intermediate learning objectives, instruction strategy, instruction sequence, case study, action learning and lesson plan.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2001년도 학술대회논문집
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• pp.151-156
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• 2001

Performance-based course design on the job of receiving substation installations is presented to achieve a work based curriculum development. It includes a job analysis method called ISD(Instructional Systems Design & Development) and DACUM(Developing a Curriculum) which is designed to accept various requirements of industrial fields. It is provided with course profile, key contents, terminal learning objectives, intermediate learning objectives, instruction strategy, instruction sequence, case study, action learning and lesson plan.

• Journal of Computing Science and Engineering
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• 제6권4호
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• pp.267-278
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• 2012

The state-of-the-art techniques in multicore timing analysis are limited to analyze multicores with shared instruction caches only. This paper proposes a uniform framework to analyze the worst-case performance for both shared instruction caches and data caches in a multicore platform. Our approach is based on a new concept called address flow graph, which can be used to model both instruction and data accesses for timing analysis. Our experiments, as a proof-of-concept study, indicate that the proposed approach can accurately compute the worst-case performance for real-time threads running on a dual-core processor with a shared L2 cache (either to store instructions or data).

• 컴퓨터교육학회논문지
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• 제16권2호
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• pp.49-60
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• 2013

이 연구는 질적 접근에 기반하여 디지털교과서 활용수업에서 나타나는 핵심성공요인들을 귀납적으로 분석하고자 하였다. 연구대상은 디지털교과서 연구학교로 지정된 인천의 D초등학교 5학년 1개 학급으로 6차시 분의 수업을 촬영하였으며, 교사 1명과 학생 3명을 대상으로 심층 인터뷰를 실시하였다. 관찰한 수업내용과 인터뷰 자료를 통해 도출된 자료들의 내용분석 방법으로는 근거이론에 기반한 코딩 방법을 사용하였으며, 자료분석 도구로는 질적자료 분석도구인 Nvivo 8.0을 활용하였다. 연구결과, 디지털교과서 활용 수업의 핵심성공요인은 '멀티미디어 기능을 활용한 체계적이고 다양한 교수학습활동', '구체적 안내 및 도움', '정보 리터러시 관련 질의응답', '물리적인 시스템과 장비의 안정성', '활발한 협력학습과 상호작용', '개별적 자기주도학습', '정서적/신체적 변화의 고려', '가용자원을 고려한 선택과 집중 전략' 등으로 나타났다.

• 보건교육건강증진학회지
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• 제21권3호
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• pp.101-116
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• 2004

Korea has the highest traffic accident occurrence rate in the world. It means that we are forced to face a tremendous amount of economic loses and great cost of life. Even though this phenomenon consistently has arose as a public issue every year and many researchers have emphasized the importance of safety education as the fundamental solution, we are still trying to make a long-lasting and effective traffic safety education programs for children and adolescents. The purpose of this study was to test the effectiveness of web-based learning for traffic safety in Korea middle school. For this purpose, the instructive model was constructed based on the ASSURE model and a special web-site of education was developed on behalf of practical use of multi-media learning materials for the traffic safety. The research subject was represented by 259 students from second grade in 2 middle schools located in Seoul Korea. The traffic safety education program using web-site was preceded to the 136 students as a case group for 45 minutes total 3 times. Other 126 students are control group those who did not get with this program. The survey was conducted before and after the education. The results of this study were as follow: 1. The knowledge analysis from the comparison between before and after of the lesson showed case group and control group scored average at 11.25 points and 10.97 points. However, after they attended programs, case group scored 13.57 points and control group scored 10.85 points. The difference from the result of the case group was statistically significant(p<0.001). 2. The attitude analysis from the comparison between before and after of the lesson showed case group and control group scored averages at 29.59 points and 28.21 points. However, after they attended program, case group scored 37.23 points and control group scored 32.71 points. The difference from the result of the case group was statistically significant(p<0.05). 3. Regarding the domain analysis by means of web-based traffic safety education, only the case group had a statistically significant score in the case of knowledge 'safe utilization of bicycle' and 'The Characteristic of Automobile and Safer Mode of Walking for Pedestrian'(p<0.01, p< 0.001), and in the case of attitude 'safe walking and crossing' 'The Characteristic of Automobile and Safer Mode of Walking for Pedestrian'(p<0.01, p<0.001). 4. Web based instruction for traffic safety was effective in terms of improving students' knowledge and attitude for traffic safety.

• 대한전자공학회논문지
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• 제21권1호
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• pp.57-61
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• 1984

본 논문에서는 마이크로프로세서의 데이터 처리부 시험을 위한 최적시험명령어 \ulcorner을 구하는 방법을 제시하였다. 기본 자료로는 user's manual로부터 얻을 수 있는 명령어 \ulcorner을 이용하였다. 최적시험명령어 선정 과정은 3단계로 설명된다: 1) 기능적으로 분리된 명령어에 대한 시험처리선도의 구성, 2) 필수선도, 제거선도 및 적임선도의 결정, 3) 최적시험명령어 \ulcorner의 확정 INTEL 8048인 경우, 최적의 시험명령어는 명령어 레퍼터리(96개의 명령어) 중 50개이다.

• 한국시뮬레이션학회논문지
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• 제12권2호
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• pp.45-53
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• 2003

This paper presents a retargetable compiled assembly simulation technique for fast ASIP(application specific instruction processor) simulation. Development of ASIP which satisfies design requirements in various fields of applications such as telecommunication, wireless network, etc. needs formal design methodology and high-performance relevant software environments such as compiler and simulator In this paper, we employ the architecture description language(ADL) named ${HiXR}^2$ to automatically synthesize an instruction-level compiled assembly simulator. A compiled simulation has benefit of time efficiency to interpretive one because it performs instruction fetching and decoding at compile time. Especially, in case of assembly simulation, instruction decoding is usually a time-consuming job(string operation), so the compiled simulation of assembly simulation is more efficient than that of binary simulation. Performance improvement of the compiled assembly simulation based on ${HiXR}^2$ is exemplified with an ARM9 architecture and a CalmRISC32 architecture. As a result, the compiled simulation is about 150 times faster than interpretive one.

• 디지털산업정보학회논문지
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• 제13권4호
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• pp.179-191
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• 2017

The purpose of this study is to investigate the change of comprehension degree about learning satisfaction and capstone class by applying the subject which draws idea for team project task in college to creative capstone design program. The Capstone Design Program is designed to train fieldworkers with creative problem solving skills and is widely applied as a problem-solving course in team-based projects. In this paper, based on the case study of the 'fusion capstone design' operated in the first semester of 2015 ~ 2017, the capstone design course was established in the course of designing ideas for problem solving. The results of this study are as follows: First, the questionnaire about capstone design instruction process, instruction method, and learning achievement satisfaction were analyzed. As a result, understanding of capstone design was found to be higher than that of class before class, and satisfaction of performance course, method of teaching performance and learning outcome were obtained.

• 한국컴퓨터정보학회논문지
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• 제18권11호
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• pp.229-240
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• 2013

본 논문은 국내 대학 컴퓨터관련 학과의 학생들이 갖추어야할 지식 중 컴퓨터 네트워크 분야의 기본 교과목인 컴퓨터 네트워크의 내실 있는 수업을 위하여, 관련 인증의 검정요강, 국내 대학에서 강의중인 교재와 강의계획서의 내용들을 분석한 후 컴퓨터 네트워크 교과목수업이 효과적으로 이루어질 수 있도록 수업내용을 체계화하였다. 또한 컴퓨터 네트워크 분야는 이론도 중요하지만 실습이 더욱 중요한 만큼 컴퓨터 네트워크 관련 국내외 인증의 실기시험용 시뮬레이터들도 분석하여 실습이 병행될 수 있도록 적용한 새로운 교수학습 개발에 관한 사례를 제안하였다. 본 논문에서 제안하는 컴퓨터 네트워크 교과목의 교수학습 사례연구는 강의와 실습의 두 가지 트랙을 기반으로 주차별로 핵심영역, 핵심요소, 교육목표, 강의 및 실습의 주제 및 도구 등을 포함하고 있으므로, 교수자에게는 좋은 교수방안이 될 것이며 학생에게는 네트워크 분야의 입문자격증인 CCNA 인증을 용이하게 할 수 있는 동기부여로 우수한 학습 결과의 성취를 기대할 수 있다.

• 대한전기학회논문지:전력기술부문A
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• 제48권12호
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• pp.1564-1574
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• 1999

In order to improve the efficiency of optimizing compilers, integration of register allocation and instruction scheduling has been extensively studied. One of the promising integration techniques is register allocation based on register-reuse chains. However, the generation of register-reuse chains in the previous approach was not completely systematic and consequently it creates unnecessarily dependencies that restrict instruction scheduling. This paper proposes a new register allocation technique based on a systematic generation of register-reuse chains. The first phase of the proposed technique is to generate register-reuse chains that are optimal in the sense that no additional dependencies are created. Thus, register allocation can be done without restricting instruction scheduling. For the case when the optimal register-reuse chains require more than available registers, the second phase reduces the number of required registers by merging the register-reuse chains. Chain merging always generates additional dependencies and consequently enforces the execution order of instructions. A heuristic is developed for the second phase in order to reduce additional dependencies created by merging chains. For matrix multiplication program, the number of registers resulting from the first phase is small enough to fit into available registers for most basic blocks. In addition, it is shown that the restriction to instruction scheduling is reduced by the proposed merging heuristic of the second phase.